N6 NPU no results when FSBL flashed

[rphii]

Hi everyone,

 

I have successfully set up a camera and the NPU working together on a Nucleo N6 to get proper outputs from the latter, which is great. I also have a way to see the image and can verify the outputs live.

However, that only works when I launch the firmware by adding the Application to the startup, loading its symbols, flashing the trusted application and starting to debug the FSBL… After that starts, I can detach the debugger to let it run the application. (BOOT0 off, BOOT1 on)

When I now flash both trusted binaries and launch without the debugger (BOOT0 and BOOT1 off) it starts normally and I see the live image. But there are no inference results (which takes the same amount of time as when it worked)…

 

What could I be missing?

Best regards, rphii

[Saket_Om]

Hello ​@rphii 

Please refer to the article below:

How to create an STM32N6 FSBL load and run | Community

[T_Hamdi]

hello ​@rphii 

The most likely cause is a cache or shared-memory issue between the camera, CPU, and NPU.

When running under the debugger, the timing and memory state can differ, so the inference may appear to work. In standalone boot, you should check that:

• the camera/NPU buffers are placed in a compatible memory region,
• the cache is cleaned before starting inference,
• the cache is invalidated after inference before reading the results,

Best regards,

Hamdi

 

[rphii]

Thanks, I will try that out. I understand what you mean with the cache, as I may or may not have that code enabled. Great to know that I do need both of those, so I will double check that.

 

I suspect that it’s highly likely a memory region issue (your first point). I tried a simpler app (disabling npu and displaying the raw RGB bytes of the image, it appeared as blue! :D) - is the RIF / rimc_master responsible for that? I know that all my used peripherals (RISUP) have to be privileged, but I did nothing with the external memories (RISAF)… so I should definitely also configure that, is that correct?

[rphii]

Alright, I managed to scrap together something that works.

I didn’t configure anything in RIF → External Memories.

 

This is what I did to make it work: 

1. Make all main ROM/RAM use regions from FLEXRAM, AXISRAM1, AXISRAM2
2. Moved the Model data (`_mem_pool_xSPI2_network`) into an own `__attribute__((section(...)))`
3. Made that section a `(NOLOAD)` in the linker script
4. Program the `.bin` of that model at the section defined above, separated from the application code (...I want to kinda have the code+model together in one binary, but this works for now...)
5. Enable mapped mode in XSPI (in FSBL disable the mapped mode before jumping to the application)
6. And also for the sake of it, don’t allocate in/output buffers of the model, I want to decide where they go