LWIP&FreeRTOS without MPU&Cache

[ECiav]

Hi all,

i have to port an application using LWIP and FreeRTOS from stm32f429/407 to stm32h743 (EVAL2 board). In the example from Cube Repository (STM32Cube_FW_H7_V1.5.0\Projects\STM32H743I-EVAL\Applications\LwIP\LwIP_HTTP_Server_Socket_RTOS\), there is MPU and Cache enabled. From this article:

https://community.st.com/s/article/FAQ-Ethernet-not-working-on-STM32H7x3

it is not clear if the MPU&Cache usage are mandatory. In the previous version of my application (stm32f4) MPU is not necessary and the Cache Core is not present. Does anyone have experience using LWIP and FreeRTOS with MPU and Cache disabled in stm32f743? Are there any pitfalls / side-effects to disable MPU & Cache?

If it were possible, disabling the cache and MPU without any problem would simplify porting operations

Thanks a lot.

[Tesla DeLorean]

If you are using DMA then your need some awareness about what memory coherency is. Mainly a function of what's physically in the memory devices the peripherals can see, and what the CPU is holding in caches, or pending writes to memory.

Turning off the cache is a bit of a cop-out. It is really not that hard to mark sections of memory via the MPU, and use those for buffers, nor to flush/clean or invalidate memory areas you plan to write/read via peripheral DMA units.