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SKS2CNC
Associate
September 2, 2024
Solved

How to disable data cache on stm32H743?

I'm using STM32H743 in my project.
If anyone knows how to disable D-cache, please help!
D-cache really interferes with my work - I'm tired of fighting it!
SCB_DisableDCache() - leads to nothing.

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mƎALLEm
mƎALLEmBest answer
ST Technical Moderator
September 4, 2024

Hello,

First, in next time, please use </> button to paste your code. I'm updating your last post.

Second, Table 2 shows the default MPU memory region attributes for Cortex-M. So, this does not mean the cache is enabled by default but the region is cacheable. For example for the regions defined by default as device or strongly ordered and even you enable the cache using SCB_EnableXCache(), that region will not be cacheable.

Third, the difference between what I provided as MPU config is the MPU control mode: MPU privileged default:

 

 /* Enable the MPU */
 HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);

 

Your code: MPU HFNMI privileged none:

 

/* Enables the MPU */
LL_MPU_Enable(LL_MPU_CTRL_HFNMI_PRIVDEF_NONE);

 

So set it to MPU privileged default.

In CubeMx:

SofLit_0-1725438182491.png

You need also to look at the Cortex-M7 programming manual PM0253 STM32F7 Series and STM32H7 Series Cortex®-M7 processor

 

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18 replies

LCE
LCE
Principal III
September 3, 2024

Just don't enable it, the source code shouldn't do that on its own.

Don't know about CubeMx, though... 

BTW, if CubeMx tells you that you need the cache for any peripheral / middleware to work: that's wrong.

    SKS2CNCAuthor
    Associate
    September 3, 2024

    Thank you for your participation. In my projects, I use Cube very sparingly - it often cannot help, but only loads the processor with unnecessary code. Unfortunately, the cache works by default - this is indicated in the documentation and in the debugger. I also observe this when processing arrays - the data does not appear immediately, but with a delay of several milliseconds - in my project this is critical. Flushing the cache by address or shared takes 50 microseconds - too much time and breaks the logic of the state machine. I will accept any advice on how to turn off the cache completely.

    mƎALLEm
    mƎALLEm
    ST Technical Moderator
    September 3, 2024

    You can disable the Cache on a specific memory region using the MPU by configuring it as Shared memory.

    Example:

     

    void MPU_Config(void)
{
 MPU_Region_InitTypeDef MPU_InitStruct;
 
 /* Disable the MPU */
 HAL_MPU_Disable();
 /* Configure the MPU attributes as WB-WA for SRAM */
 MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 MPU_InitStruct.BaseAddress = <Your memeory start address>;
 MPU_InitStruct.Size = MPU_REGION_SIZE_<of your memeory region>;
 MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
 MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 MPU_InitStruct.SubRegionDisable = 0x00;
 MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;

 HAL_MPU_ConfigRegion(&MPU_InitStruct);

 /* Enable the MPU */
 HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}

     

     

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    Pavel A.
    Pavel A.
    September 3, 2024

    Try LL_MPU_CTRL_HFNMI_PRIVDEF instead of LL_MPU_CTRL_HFNMI_PRIVDEF_NONE.

     

      SKS2CNCAuthor
      Associate
      September 5, 2024

      Sorry for the long answer - I was testing!
      Thanks to everyone - advice with LL_MPU_CTRL_HFNMI_PRIVDEF - the cache is disabled for the necessary memory areas - this is what you need!

        mƎALLEm
        mƎALLEm
        ST Technical Moderator
        September 5, 2024

        Hello @SKS2CNC  if your question has been answered please mark Accepted as Solution the comment that answered your question.

        To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.
        LCE
        LCE
        Principal III
        September 4, 2024

        I don't see that any cache is enabled by default, neither in the AN4839 (see 4 Mistakes to avoid and tips, the advice to invalidate cache before enabling it sounds like it's OFF at CPU start), nor in my H723/733/735 source code (not using HAL). I'm not using any cache, and I'm not disabling it.

          SKS2CNCAuthor
          Associate
          September 5, 2024

          Thanks for the links to AN4839 and PM0253 - it helped for general understanding.

          mƎALLEm
          mƎALLEm
          ST Technical Moderator
          September 5, 2024

          Did the config I provided solved your issue? 

          To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.
          SKS2CNCAuthor
          Associate
          September 5, 2024

          I don't use the cube much - it was enough for me to solve
          LL_MPU_Enable(LL_MPU_CTRL_HFNMI_PRIVDEF);
          By the way, for some reason I didn’t find these LowLevel functions in the UM2217 ;)

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