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Nikita91
Lead II
December 10, 2021
Solved

How many PVD in STM32G4xx? Error in RM0440 or in devices files ?

In RM0440 R6 6.2.3 there is "Each of the four PVMx (x=1, 2)". So 4 or 2 PVM ?

In the PWR_CR2 register 6.4.2:

Bit 7 PVMEN2: Peripheral voltage monitoring 4 enable

Bit 6 PVMEN1: Peripheral voltage monitoring 3 enable

=> PVMEN1 is for PVM1 or PVM3?

=> Only 2 PWM specified

In the file stm32G431xx.h:

There is bits définitions for 4 PVM.

Example for PVM1:

#define PWR_CR2_PVME1_Pos (4U)
#define PWR_CR2_PVME1_Msk (0x1UL << PWR_CR2_PVME1_Pos) /*!< 0x00000010 */
#define PWR_CR2_PVME1 PWR_CR2_PVME1_Msk 

This define PVME1 (Not PVMEN1 as in the RF) as bit 4. The bit 4 is not specified in the RM.

So my question: how many PVMs and what bits to use in PWR_CR2 ?

This topic has been closed for replies.
Imen.DBest answer
ST Technical Moderator
December 14, 2021

Hello @Nikita91​ ,

Thank you for pointing out this issue.

In STM32G4xx, there is only 2 PVMx (x=1,2).

So, in RM0440 the PVMENx should be renamed to PVMEx (to be in line with HAL definitions):

0693W00000HoXidQAF.png 

Also, the mistake of 4 PVM thresholds will be corrected and this text should be updated (remove "..the four") :

0693W00000HoXfPQAV.png 

Note that the next revision of the RM0440 is planned in the first quarter of 2022.

Thank you once more for your contribution.

When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.

Imen

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks

5 replies

Imen.DBest answer
ST Technical Moderator
December 14, 2021

Hello @Nikita91​ ,

Thank you for pointing out this issue.

In STM32G4xx, there is only 2 PVMx (x=1,2).

So, in RM0440 the PVMENx should be renamed to PVMEx (to be in line with HAL definitions):

0693W00000HoXidQAF.png 

Also, the mistake of 4 PVM thresholds will be corrected and this text should be updated (remove "..the four") :

0693W00000HoXfPQAV.png 

Note that the next revision of the RM0440 is planned in the first quarter of 2022.

Thank you once more for your contribution.

When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.

Imen

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
Nikita91
Nikita91Author
Lead II
December 14, 2021

Thank you for the manual clarification.

But what is the correct PWR_CR2 bit to use for PVM1: bit 6 as in RM or bit 4 as in stm32G431xx.h ?

ST Technical Moderator
December 14, 2021

It's Bit 6. as in RM0440.

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
Nikita91
Nikita91Author
Lead II
December 15, 2021

@Imen DAHMEN​  : So don't forget to fix CMSIS files like stm32G431xx.h