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waclawek.jan
Super User
Jan 16, 2018 8:11 PM UTC
Solved

['F446 documentation] RCC - frequency limit of dedicated SPDIF-Rx output from PLLI2S

Posted on January 16, 2018 at 21:11

0690X00000609KLQAY.png

However, SPDIF-Rx needs at least 135.2 MHz  to support 192kHz audio sampling rate.

Can ST please comment?

Thanks,

Jan Waclawek

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waclawek.jan
waclawek.janBest answer
Super User
Jan 29, 2019 8:14 AM UTC

Hi Imen,

Thanks for the clarification.

This then should be corrected in both the datasheet (3.27 SPDIF-RX Receiver Interface (SPDIFRX)) and RM0390 rev.4 (27.2 SPDIFRX main features and Table 168. Minimum SPDIFRX_CLK frequency versus audio sampling rate, ).

Jan

4 replies

ST Technical Moderator
Jan 28, 2019 2:51 PM UTC

Hello,

We proposed to add a note in the coming release of reference manuals in Section "Clocking strategy" after table "Minimum SPDIFRX_CLK frequency versus audio sampling rate" like this:

“Please check the RCC capabilities in order to verify which sampling rates can be supported.�?

Kind Regards,

Imen.

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waclawek.jan
Super User
Jan 28, 2019 3:40 PM UTC

@Imen DAHMEN​  ,

Thanks for the reply.

So, does this mean that the STM32F446 does *not* support 192kHz audio sampling rate on SPDIF-Rx?

JW

ST Technical Moderator
Jan 29, 2019 7:48 AM UTC

@Community member​ ,

Yes, I confirm we can't support 192KHz.

Regards,

Imen.

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waclawek.jan
waclawek.janAuthorBest answer
Super User
Jan 29, 2019 8:14 AM UTC

Hi Imen,

Thanks for the clarification.

This then should be corrected in both the datasheet (3.27 SPDIF-RX Receiver Interface (SPDIFRX)) and RM0390 rev.4 (27.2 SPDIFRX main features and Table 168. Minimum SPDIFRX_CLK frequency versus audio sampling rate, ).

Jan