The short answer - no.
But there are useful benefits of using MPU. Typically it's used for two purposes:
- To configure descriptor memory as a device memory type. This is related to load/store instruction (re)ordering.
- To configure/limit/disable data buffer memory caching. This can relieve the code from doing invalidate/flush operations, but it must be noted that, if you implement a zero-copy driver, then the output frames can come from different memories. Therefore at least with zero-copy drivers doing invalidate/flush in code is more flexible solution.
You can find more details on this in AN4838 and AN4839. And also AN4667 and AN4891 are useful. Memory caching obviously is related only to Cortex-M7. As for a memory types...
The Cortex-M processors never perform memory accesses out of order compared to instruction flow, however, the architecture does not prohibit this in future implementations. ARMv7-M code written to be portable to ARMv7-AR processors, like Cortex-A9, must already take account of this ordering model.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0321a/BIHJIIIC.html
But take a note that Cortex-M7 is not included in that AN321 and... Here we go - Cortex-M7 is that future implementation they were talking about and it really is reordering memory accesses.