What happen if BOOT0 is not connected to GND?

[volkan_]

Hi everyone, 

Is that not connecting BOOT0 to GND a problem? I forgot to connect it. İs it fine to be floating? 

Thank you in advance.

 

[Peter BENSCH]

[edit]
The following statement only applies to devices that do not yet have a pull resistor on the SW pins, e.g. the older STM32F103. For detailed information, please refer to the respective reference manual for the GPIO and pull-up (for SWDIO) or pull-down (for SWCLK).
[/edit]

No, BOOT0 is not allowed to float under any circumstances (see note above) because the high-resistance pin reads a different state every time it is started and then jumps to the bootloader incorrectly, for example!

Regards
/Peter

[AScha.3]

btw

@Peter BENSCH ,

Wouldn't it be a great idea for future cpu products, to put a pulldown , or pullup as on NRST,  to all important pins for a successful start of the core ? 

[Peter BENSCH]

@AScha.3 It could be a good idea to put pulls on these pins, but I don't know the reasons why it hasn't been implemented yet. However, it is explicitly stated in the documents - if you read them - and find it.

 

[Peter BENSCH]

If you are not using PB8 and PB9 in the project, you can connect them together with BOOT0 to VSS i.e. GND. However, to be on the safe side, check that PB8 and PB9 are set as inputs in the program (analogue or digital) so that an output does not inadvertently try to drive VSS to VDD level.

Good luck!
/Peter

[volkan_]

Thank you Peter for the reply. I will define PB8 and PB9 as GPIO input in software. One last question. Is it better option to short  PB8, PB9 and BOOT0 pins and connecting them using single 10k ohm pull down resistor to ground or using pull down will not make any difference? 

 

 

[Tesla DeLorean]

What happens? Often indeterminate operation, especially if the supply rises slowly. Can lead to the ROM code being run rather than user code in FLASH. In the field this is generally undesirable.

I doesn't have to be directly connected to Ground, better to use a pull down, then a test fixture can be used to change the level in production programming or test situations.

[Peter BENSCH]

A pull-down is only necessary to protect the STM32 if, for whatever reason, the pin should have a high level. If you know this for your 2000 devices and can rule it out, there is no reason not to connect the pins and BOOT0 together to GND. But as @Tesla DeLorean already mentioned, low should actually be realised via a pull-down.

Good luck!
/Peter

[maxter]

Note 6 below the pin description table in https://www.st.com/resource/en/datasheet/stm32g0b1cc.pdf says: "Upon reset, these pins are configured as SW debug alternate functions, and the internal pull-up on PA13 pin and the internal pull-down on PA14 pin are activated.", where PA14 is BOOT0. If there is no intention to disable the internal pull-down, no external pull-down is necessary for that model, isn't it?

[Peter BENSCH]

Thank you, @maxter, your statement is correct and I must correct my statement above that external pull resistors are always necessary on SW. This is from the old days of the STM32F103 and its colleagues, where there were indeed often problems if the SW pins did not have a defined potential.

You would now have to check the reference manuals to see exactly when the internal pull resistors were introduced on the SW pins. For the STM32F030 (mentioned by the TO), your STM32G0B1 and similar devices from that family, a fixed potential on the SW pins is no longer necessary, which can be concluded from RM0360, section 8.3.1 and RM0444, section 7.3.1.

Thanks again!

Regards
/Peter