How many HW breakpoints does STLINK-V3 family have? I'm interested on STLINK-V3MINIE

[JGast.2]

..

[Tesla DeLorean]

Probably whatever the MCU facilitates via FPB units.

I don't think they offer "Flash Break Points" in the Segger sense.

You could also use a Break Point function (use a checkpoint code, or __FILE__,__LINE__), or explicitly place BKPT # instructions. Perhaps gate those with a flag variable so you can run the exact same code in release/debug conditions.

Use instrumentation to determine dynamic flow.

Dead-stopping some machines can cause catastrophic damage, you learn to approach things differently..

[JGast.2]

I understand your point, runtime debugging is always available, but i'm looking for HW capabilities, knowing that they "break" the program.

So you mean it all depends on the MCUs embedded comparators? STLINK does not provide HW breakpoints itself?

[AScha.3]

AFAIK..

The ARM cores have different complexity, from simple F0 to H7 or F7​, and so are the integrated co-processors, the debug units.

See ARM documents about cores and debug capabilities..

So the hardware debug capabilities are fixed with your choice of core.

Big core has big debug units...

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