ADC readings drift

[ST Migration account]

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using the STM32G473CET6 and have configured 4 ADC channels. When scan mode is enabled, the readings from the first two channels are normal, but for the last two channels with an active voltage signal input, the ADC still shows readings of over a thousand when 0V is input. When I disconnect the external interface, I find that this channel has a voltage over 1.3V after initialization. Why is this happening? Later, I tried enabling single-read mode and initializing the ADC interface each time before reading, and the values read were normal.

[Ozone]

Show the initialisation code.

Perhaps the common "bleed over" effect of multiplexed SAR-ADCs.
All channels share one S&H capacitor, which is successively switched to an input, then to the converter, and then switched to the next channel.
If the sample times and inter-sample times are short and the inputs have a too high input impedance, the S&H capacitor is not discharged fully, and you get said channel cross-interference. 

[ST Migration account]

Thank you for your reply, so how to solve "bleed over" effect

[Ozone]

Keywords like "bleed over" and "cross interference" are given, you can look it up yourself.

> If the sample times and inter-sample times are short and the inputs have a too high input impedance, the S&H capacitor is not discharged fully, and you get said channel cross-interference. 

And not to repeat myself, the solution is in the description of the problem.
Understanding how a SAR-ADC works is key.

[Gyessine]

Hello  

As @Ozone   suggested, the issue is very likely caused by the sample-and-hold (S/H) capacitor inside the ADC, which does not fully settle between channels.

A possible software workaround is to assign the problematic channel to two consecutive ranks in the scan sequence. Then, discard the first conversion and use the second one. This method gives the ADC enough time to settle and can help achieve a more accurate reading for that channel.

A possible hardware solution is to lower the input impedance of the affected ADC channels

And just in case, since apparently a custom PCB is in use, double-check your hardware implementation (pins,ground wiring etc....) 
BR
Gyessine

[Ozone]

> A possible hardware solution is to lower the input impedance of the affected ADC channels

Or to use a longer sampling period.