FAQ: Configuring the VDD50USB and VDD33USB pins on STM32H7 when not using USB

[FBL]

Introduction 

There are different ways to supply the USB transceivers on STM32H7 products, depending on VDD33USB and VDD50USB availability.

1. VDD33USB pin configuration

According to STM32H7 datasheets, when USB is not used, the VDD33USB pin should be handled as follows:

• USB PHY deactivated and related USB GPIOs (DP and DM not used)
• Connect the VDD33USB pin to VDD. This will not impact your power consumption.
• Ensure that the VDD33USB supply level detector is disabled in the firmware to avoid any unintended behavior.

2. VDD50USB pin configuration

The VDD50USB pin should not be left floating when USB is not used:

• Connect the VDD50USB pin to VDD33USB. Leaving VDD50USB floating is forbidden and is not guaranteed by design.

Note: 

For STM32H7RS, when USB is not used, we don't have a particular constraint. Users can connect VDD33USB to 0 V to minimize any possible leakage.

Conclusion

By following these guidelines, you can properly configure the VDD33USB and VDD50USB pins on the STM32H7, ensuring stable operation and proper power management for the USB transceivers. To learn more about how to configure power supply in USB application, refer to section 2.1.4 Independent USB transceiver power supply in AN5419.

Related links 

• Application note 5419: Getting started with STM32H723/733, STM32H725/735 and STM32H730 Value Line hardware development
• Datasheet 12932 rev. 2: STM32H745xI/G

[PhucXDoan]

The VDD50USB pin should be left floating when USB is not used:

• Connect the VDD50USB pin to VDD33USB. Leaving VDD50USB floating is forbidden and is not guaranteed by design.

So should VDD50USB be left floating or not?

[FBL]

Hi @PhucXDoan 

Thank you for highlighting this ! Corrected

[CircuitDesigner]

Hi, @FBL 
Does VDD33USB require capacitors when it's not used? The application note (AN5419) seems to imply this in figure 3, where a 1uF and a 100nF capacitor is placed on the pin, while it's connected to 3.3V.
On the other hand, your post does not mention additional capacitors.

[lelelele]

I'm designing a board with an STM32H7R3 device. This snippet from Table 4 in AN5935 recommends using 0V if the USB is not used, which seems to contradict the advice here. Which would you recommend I follow? 

 

[FBL]

Hi @lelelele 

For STM32H7RS, when USB is not used, we don't have a particular constraint. User can connect VDD33USB to 0V to minimize any possible leakage. We are updating the FAQ to add this as a note.

[Inf75]

Hi, for STM32H755, we are not using VBAT; VDD33USB; VDD50USB or PDR_ON. Can these all be tied to VDD with 1 x 100nF cap tied to GND?