ST25R100: autonomous WU_MEASUREMENT never emits RF, but manual CALIBRATE_WU_MEASUREMENT does

[Panchev68]

Setup

• Board: X-NUCLEO-NFC09A1 (ST25R100), brand new, unmodified, no jumpers/solder bridges changed

• Host: STM32, custom C++17 driver (register-level, not RFAL)

• SPI: confirmed working — bring-up sequence completes, all register reads/writes verified against DS14139 Rev 4

Symptom

The autonomous wake-up measurement cycle (triggered internally by the WUT every wut period) never emits any RF onto RFO1/RFO2, confirmed directly on an oscilloscope. However, the CALIBRATE_WU_MEASUREMENT direct command (0x74), issued manually once during bring-up, reliably emits a real RF burst every time (5 sub-pulses of ~26 µs each, ~130 µs total).

This has been reproduced consistently across many test runs, with the following independently confirmed facts:

• wu_en is set and read back correctly (OPERATION = 0x01).

• The WU timer itself is confirmed running: with wuti (WU_CONTROL_1 bit 3) set, I_wut fires reliably in IRQ_STATUS_3 on schedule, tested at both wut = 77.3 ms and wut = 9.7 ms.

• IRQ_MASK_3 correctly unmasks M_wui/M_wuq.

• The physical IRQ pin → GPIO → ISR chain is confirmed working end-to-end (verified via a heartbeat counter incrementing on every notified IRQ_STATUS_3 read).

• WU_I_CALIBRATION/WU_Q_CALIBRATION (0x2E/0x33) read back non-zero, real values (e.g. 0x4C/0xA0) after CALIBRATE_WU_MEASUREMENT — confirming the analog path is functional when driven manually.

• WU_I_ADC/WU_Q_ADC/WU_I_REFERENCE/WU_Q_REFERENCE (0x2C/0x31/0x2D/0x32) remain exactly 0x00 in every autonomous-cycle read, regardless of card presence, both with a card held directly against the antenna and without.

• RX_ANALOG_2 afe_gain_td<3:0> set to maximum (0x0 → 26 dB) — no change.

• WU_CONTROL_2 measurement pulse length (td_mf/td_mt<1:0>) set to maximum (43.7 µs) — no change.

• ADJUST_REGULATORS issued during bring-up before any WU configuration — no change.

• skip_cal (WU_CONTROL_2 bit 6) tried both set and cleared (i.e. with and without the chip's own automatic first-WUT calibration) — no change.

• GENERAL_CONFIG single bit left at 0 (differential antenna driving), matching the X-NUCLEO-NFC09A1 schematic (RFO1/RFO2 both routed to the matching network).

• IC_IDENTITY (0x3F) reads a plausible, stable, non-zero value on every bring-up — chip is alive and responsive on SPI.

• Directly probing performIqMeasurement() (IQ_MEASUREMENT, 0x7A) with tx_en/rx_en explicitly forced on beforehand: still 0x00/0x00.

• SENSE_RF (0x7C) result register (Display 3, rf_ind<6:0>): 0x00.

• Holding tx_en/rx_en on continuously for 60 s with no measurement command involved at all (holdFieldOn()): oscilloscope shows nothing on RFO1/RFO2 for the whole window.

• Oscilloscope in free-running/high-persistence mode, 5–10 s capture windows, at both wut = 77.3 ms and wut = 9.7 ms: RF is visible only during the initial CALIBRATE_WU_MEASUREMENT burst at bring-up, never during any subsequent autonomous cycle.

Question

CALIBRATE_WU_MEASUREMENT and the autonomous WU_MEASUREMENT cycle are documented as sharing the same underlying "temporarily enable → RF pulse → measure" mechanism (AN5993). Given the above, they appear to behave very differently on this device: the manual calibration command reliably drives RF (with a fixed ~130 µs / 5×26 µs sweep independent of the configured td_mf/td_mt), while the autonomous per-wut measurement pulse never does, under any tested register configuration.

Is there a register, bit, or sequencing requirement — not covered in DS14139 Rev 4 or AN5993 — that specifically arms the autonomous measurement pulse, separately from wu_en and the WUT itself? Or is this expected/known behavior under some configuration we may be missing?

Happy to share full SPI logic-analyzer captures (bring-up sequence + register values) and oscilloscope captures on request.

[Ulysses HERNIOSUS]

Hi,

in your description you are missing to set the tdis:
 

ST25R200 DS end of chapter 5.12

If they are all zero then no pulse is emitted.

Ulysses

[Panchev68]

Hi Ulysses,

Thanks for the pointer. I added SPI readback verification (with retry) on WU_I_CONFIG/WU_Q_CONFIG right after every write, specifically to rule this out.

Logic analyzer trace confirms i_tdi_en<2:0>/q_tdi_en<2:0> are non-zero on every bring-up, verified via readback immediately after each write:

t=0.037328  write WU_I_CONFIG (0x2A) = 0x05
t=0.037377  read  WU_I_CONFIG readback → 0x05   (verified match, no retry needed)
t=0.037473  write WU_Q_CONFIG (0x2F) = 0x05
t=0.037521  read  WU_Q_CONFIG readback → 0x05   (verified match, no retry needed)

0x05 = i_tdi_en2=1 (above upper) + i_tdi_en0=1 (below lower), i.e. both edges enabled on both I and Q channels — not zero, and confirmed to land correctly every single bring-up, not just intended.

The rest of the sequence is clean too: WU_I_CALIBRATION/WU_Q_CALIBRATION read back non-zero (0x42/0x96) after CALIBRATE_WU_MEASUREMENT, IRQ masks correct, OPERATION = 0x01 (wu_en) verified.

The symptom is otherwise unchanged: IRQ_STATUS_3 reads a stable 0x02 (I_wut only) on every wut period — tested at both 77.3 ms and 9.7 ms — but never 0x06/0x0A (i.e. I_wui/I_wuq combined with I_wut). Oscilloscope on RFO1/RFO2 confirms: RF is emitted reliably during CALIBRATE_WU_MEASUREMENT (5×26µs sub-pulses, ~130µs total) at bring-up, but never during any subsequent autonomous cycle, even over multi-second high-persistence capture windows.

So with i_tdi_en/q_tdi_en now positively ruled out (readback-verified non-zero on every run), the autonomous WU_MEASUREMENT cycle still never emits RF, while the manual CALIBRATE_WU_MEASUREMENT direct command does so reliably every time. Any other ideas on what could gate the autonomous pulse specifically?

Happy to share the full logic analyzer capture if useful.

[Ulysses HERNIOSUS]

Hi,

best if you compare complete register map against the a register map from our STEVAL-25R200 GUI while running Wakeup (With Ctrl-C and Ctrl-V you can easily paste into Excel for comparison).

Maybe your software involuntarily messed with d_res setting putting RFO to highZ. But these are blind guesses. 

If your regs comparison does not reveal anything, then please feel free to share logic analyzer traces (SPI+IRQ).

BR, Ulysses

[Panchev68]

Hi Ulysses,

Full register map dump (single auto-incrementing SPI read, address 0x00 → 63 data bytes), taken 3s after bring-up while the device sits undisturbed in autonomous WU mode:

0x00 OPERATION      = 0x01   (wu_en=1)
0x01 GENERAL        = 0x00   (differential, single=0)
0x02 REGULATOR      = 0x5F   (POR default — regd/rege unchanged, reg_s=0 so actual VDD_DR comes from adjust regulators result)
0x03 DRIVER (d_res) = 0x00   (POR default: d_res<3:0>=0000 → MINIMUM resistance / full drive, NOT High-Z)
0x04 TX_MOD1        = 0x71   (am_mod<3:0>=0111 matches default, but reg_am (bit0) = 1 — POR default is 0, we never write this register)
0x05 TX_MOD2        = 0x00   (default)
0x06 RX_ANALOG1     = 0x53   (default)
0x07 RX_ANALOG2     = 0x00   (afe_gain_td=0000, our intended max-gain config)
0x08–0x22 (RD-domain regs) = 0x00   (expected: inaccessible while chip sits in WU mode, not RD)
0x0F DISPLAY1       = 0x73   (agd_ok=1, osc_ok=1 — appears to be a stale/latched value from bring-up, since osc/AGD blocks aren't listed as active in WU mode)
0x24 DISPLAY4       = 0x80   (bit7 RFU=1 matches default; all i_tdi<2:0>/q_tdi<2:0> = 0 — live comparator never reached any above/between/below conclusion)
0x28 WU_CTRL1       = 0x68   (wut=0110, wuti=1 — as configured)
0x29 WU_CTRL2       = 0x3B   (skip_twcal|skip_twref|iq_aaref|td_mt<1:0>=11 — as configured, skip_cal left at 0)
0x2A WU_I_CFG       = 0x05   (i_tdi_en: above+below)
0x2B WU_I_DIFF      = 0x08
0x2C WU_I_ADC       = 0x00
0x2D WU_I_REF       = 0x00
0x2E WU_I_CAL       = 0x43   (non-zero, calibration succeeded)
0x2F WU_Q_CFG       = 0x05   (q_tdi_en: above+below)
0x30 WU_Q_DIFF      = 0x08
0x31 WU_Q_ADC       = 0x00
0x32 WU_Q_REF       = 0x00
0x33 WU_Q_CAL       = 0x96   (non-zero, calibration succeeded)
0x39–0x3B IRQ masks = 0x00 (0x39/0x3A RD-domain, inaccessible right now; 0x3B PD-domain, matches our intended 0x00 = unmask WUI/WUQ)
0x3C–0x3E IRQ status = 0x00
0x3F IC_ID          = 0xA9   (stable across every bring-up)

d_res is ruled out: confirmed at POR default (0x00 = minimum resistance / full drive strength), not High-Z. Good guess, but not it.

One genuine anomaly found: TX_MOD1.reg_am (address 0x04, bit 0) reads 1, but POR default is 0, and we never write to this register anywhere in our code. reg_am enables the VDD_AM regulator path used for AM modulation — not directly the OOK/WU measurement path as far as I understand it, so I'm not confident it's the root cause, but it's an unexplained deviation from default worth flagging.

New data point: DISPLAY4 (0x24, live i_tdi<2:0>/q_tdi<2:0> comparator output, read-only) is 0x80 — i.e. all comparator condition bits are 0. So the live comparator itself never reaches any above/between/below conclusion during the autonomous cycle, consistent with no measurement pulse ever actually running (matches the oscilloscope finding).

Symptom is otherwise unchanged: CALIBRATE_WU_MEASUREMENT still reliably produces ~130µs of RF at bring-up; the autonomous WU_MEASUREMENT cycle still produces nothing, on every subsequent wut period.

Any thoughts on what could set reg_am unexpectedly, or does that look unrelated to you too?

[Ulysses HERNIOSUS]

Hi,

I pushed your changes into the register map of STEVAL-25R200 after having issues a SET DEFAULT: It worked for me.

P.S.: Not having field with tx_en=1 and en=0 is expected. Oscillator (en=1) needs to be enabled first.

RFAL is built to avoid many of the small pitfalls. I am somewhat sure if you used it, it would work.

Please feel free to share SPI+IRQ traces!

 

Ulysses