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a18k
Associate
August 6, 2026
Solved

ST25DV60KC Antenna Design Review

  • August 6, 2026
  • 4 replies
  • 142 views

Hello ST Team,

Could you please review the attached ST25DV60KC NFC antenna design and provide any recommendations regarding the antenna design, schematic, and PCB layout?

Any comments or best practices before PCB release would be greatly appreciated.

Thank you for your support.

Best answer by Henry Crane

Hello,

ST25DV conections are now OK.

Concerning the antenna, I noticed that a significant number of the footprints recommended for removal by my colleague are still present in the schematic and layout. In fact, the antenna is placed in a corner of the PCB, surrounded along two sides by the ground plane. it means that the actual antenne inductance will be lower than the one simulated in free air. as the resut, the tuning frequency of the tag will be higher than the expected one and you’ll need to adjust the parallel capacitor C12 to restore the tuning and maximize the RF performance.

So you can simplify the schematic and space on PCB keeping only C12, eventually C11 and C13, and remove other caps and inductors.

I don’t know if it the case here, but some application require to be able to tune down (using a parallel capacitor like C12) but also tune up the resonant frequency: this can be done using two series capacitors (same values on AC0 and AC1), replacing L2 and L3, populated with 0 ohm by default. All other componant are useless.

 

feel to get back to us,

 

regards,

 

Henry Crane , ST25 product line support team.

4 replies

JL. Lebon
JL. Lebon
ST Employee
August 7, 2026

Hello, 

I would have several comments on this design.

First of all, the antenna design itself looks good. Nevertheless, I would recommend tuning it a little bit higher in frequency. I recommend tuning, around 13.7MHz, since coupling with the reader, if it is close, will detune a little bit.

Second recommendation: I should let a larger clearance between the antenna and the ground plan to allow the magnetic field to circulate more freely around the antenna: you can add clearance between the antenna and ground plane on the top (where the components are) and you should remove the ground plan on the right side, which is useless anyway.

Now for the schematics, there are several problems that will prevent it to work.
First the VCC is connected to ground. This will prevent the I2C part of the tag to work. If you want to use I2C, you must connect the VCC pin to a power supply of at least 1.8V. I see that you have connected V_EH to 3V3: this is also wrong. v_EH is an output power supply, not an input. It outputs energy harvested on the RF antenna, to power external devices in case there is no power supply on the board. If you don’t plan to do that, please leave it unconnected. Another way to use V_EH, is to connect it to the VCC pin so that the I2C power supply of the chip is harvested on the RF antenna. But in any case, if you want to use I2C the VCC pin must not be connected to ground.

Second issue is all the components on the antenna. This is not necessary, and this will change the tuning so the system will not work. I guess you probably copied it from an antenna design of a NFC reader, which is a completely different system than a tag. There is no extra component required between the ST25DV and the antenna. The St25DV must be connected directly to the antenna if it is designed to match the 28.5pF of the device.
You must remove L1000, L1001, C1100, C11011, C11010, C111. You can keep the footprint for C11, C12 and C13. C12 can help change the tuning (decrease frequency) and C11/C13 may help in case for EMC issues. But the other capacitor and the inductance must go.

Best regards.

a18kAuthor
Associate
August 10, 2026

Hello,

Thank you for your detailed feedback and recommendations.

I have made the requested modifications to the NFC schematic and PCB layout based on your comments, including the antenna tuning, ground clearance, VCC/V_EH connections, and removal of the unnecessary antenna components.

Could you please review the updated design again and confirm whether everything is now correct, or if any further modifications are required?

Thank you in advance for your support.

Best regards,

a18kAuthor
Associate
August 10, 2026

Hello,

Thank you for your detailed feedback and recommendations.

I have made the requested modifications to the NFC schematic and PCB layout based on your comments, including the antenna tuning, ground clearance, VCC/V_EH connections, and removal of the unnecessary antenna components.

Could you please review the updated design again and confirm whether everything is now correct, or if any further modifications are required?

Thank you in advance for your support.

Best regards,
 

Henry Crane
Henry CraneBest answer
ST Employee
August 20, 2026

Hello,

ST25DV conections are now OK.

Concerning the antenna, I noticed that a significant number of the footprints recommended for removal by my colleague are still present in the schematic and layout. In fact, the antenna is placed in a corner of the PCB, surrounded along two sides by the ground plane. it means that the actual antenne inductance will be lower than the one simulated in free air. as the resut, the tuning frequency of the tag will be higher than the expected one and you’ll need to adjust the parallel capacitor C12 to restore the tuning and maximize the RF performance.

So you can simplify the schematic and space on PCB keeping only C12, eventually C11 and C13, and remove other caps and inductors.

I don’t know if it the case here, but some application require to be able to tune down (using a parallel capacitor like C12) but also tune up the resonant frequency: this can be done using two series capacitors (same values on AC0 and AC1), replacing L2 and L3, populated with 0 ohm by default. All other componant are useless.

 

feel to get back to us,

 

regards,

 

Henry Crane , ST25 product line support team.

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