Skip to main content
Daniel N
Daniel N
Associate II
October 18, 2021
Question

STM32H7 DualCore and DMA MEM2MEM IRQ Handlers generate only at M7's side

  • October 18, 2021
  • 3 replies
  • 2219 views

Is there a way in STM32CubeMX for STM32H7 DualCore projects to choose where to generate IRQ Handler for DMA in MEM2MEM mode?

My use case is as follows:

Regarding performance I stay only at D2 domain side (M4's side).

I don't want to use D1->D2 or D2->D1 bridges, so at the moment, my main application is at M4's side.

I use:

STM32CubeIDE in Version: 1.7.0

that embeds STM32CubeMX in Version: 6.3.0-RC5 Build: 20210714-1111 (UTC)

When I activate DMA in MEM2MEM mode, there is no way to tell the STM32CubeMX tool that I want it's IRQ Handler to be generated on M4 side - like for every other periphery.

It always generates it at M7's side no matter if I choose to show all interrupts at the following picture and tick one that I want at M4's side.

0693W00000FCqB6QAL.png

This topic has been closed for replies.

3 replies

Khouloud OTHMAN
Khouloud OTHMAN
Associate
October 20, 2021

Hello @Daniel N​ ,

First let me thank you for having reported.

In fact, I can partially reproduce the issue from my side: When showing all interrupts in the NVIC2 Interrupt Table, DMAx Streamx global interrupts are displayed in the table:

0693W00000FDCgAQAX.png 

After enabling DMA1 Stream1 global interrupt (for example), hdma_memtomem_dma1_stream0 is correctly initiated in the generated stm32h7xx_it.c file (under CM4): 

/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_memtomem_dma1_stream0;

But the function DMA1_Stream1_IRQHandler(void) handling the DMA1 stream1 global interrupt is not generated.

This will be raised internally to be reviewed. I'll keep posted with the updates.

Thanks for bringing this to our attention.

Khouloud.

EOzde.1
EOzde.1
Associate III
June 24, 2022

Hi,

Is there any update on this topic?

Thank You.

    Daniel N
    Daniel NAuthor
    Associate II
    October 22, 2021

    Hello Khouloud,

    Thank you for a quick response.

    IMO for DMA MEM2MEM we should also have choice where to generate init function: in M7 or in M4, as it is for e.g. CRC:

    0693W00000FDPOnQAP.png0693W00000FDPP7QAP.png

    Terms & ConditionsAccessibility statement