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Rookie38
Rookie38
Associate III
February 25, 2021
Solved

How to analyze the cause of independent Watchdog Reset

  • February 25, 2021
  • 3 replies
  • 2506 views

Hello Community,

I use the IWDG of a STM32F429. My application is relatively simple. Two valves are controlled and data is sent via UART (non-blocking). Nevertheless, I notice at random times a reset of the controller by the watchdog. The window watchdog apparently owns a notification possibility via Early Wakeup Interrupt (EWI). Such a feature does not seem to exist in the IWDG. I wonder what is now available as an option to determine the function with the longest execution time without having to trace everywhere. Is there a way to know where the controller is just before the reset? Does ST already offer some kind of instrumentation?

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Best answer by Uwe Bonnes

SWO trace could watch the programm counter and give a hint what happened last, if sampling frequency is high enough.

3 replies

Uwe Bonnes
Uwe BonnesBest answer
Chief
February 25, 2021

SWO trace could watch the programm counter and give a hint what happened last, if sampling frequency is high enough.

Tesla DeLorean
Tesla DeLorean
Guru
February 25, 2021

Logging the stacked LR in SysTick might provide insight into which routines are candidates for review.

Also instrument Hard Fault and Error Handlers so you can readily tell if it gets into those while(1) loops to die, and save information related to the registers, and source file/line info.

Hard Fault catches a lot of bugs and latent failures in the code.

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