Interfacing with I2C does not work in STM32F100xx Value line Discovery?Please help

Hi all,I want to use the I2C of my STM32F100xx Low/Medium density value line Discovery board but without using STM32cube IDE because i want to learn the basic register initialization and each step necessary so that i can port it to any IDE but i am unable to get anything from my SCl and SDA pin.Here the code that i develop using IAR EWARM With the help of CD00246267.Point to note before this i interface GPIO as well as USART without any problem but in I2C didn't get any success.Here i am using PCF8574T as slave.Please help ..

#include <ST/iostm32f100xB.h>
void delay(void);
void i2c_init();
void I2c_sendata(char);
 
 
int main()
{
 i2c_init(); 
 while(1)
 {
 I2c_sendata('A');
 delay(); 
 }
 
void i2c_init()
{
 /**************************************************************************/
 //PB6(SCL) and PB7(SDA)
 I2C1_CR1_bit.PE=0;//disable pheripheral ,otherwise it is not allowed to make any changes in other register
 GPIOB_CRL_bit.MODE6=0x3;//Output mode, max speed 50 MHz
 GPIOB_CRL_bit.MODE7=0x3;//Output mode, max speed 50 MHz
 /*For bidirectional Alternate Functions, the port bit must be configured in Alternate Function Output mode (Push-Pull or Open-Drain). 
 In this case the input driver is configured in input floating mode*/
 GPIOB_CRL_bit.CNF6=0x3;//Alternate function output as open drain while input as floating
 GPIOB_CRL_bit.CNF7=0x3;//Alternate function output as open drain while input as floating
 RCC_APB1ENR_bit.I2C1EN=1;//Enable I2C1
 RCC_APB2ENR_bit.IOPBEN=1;//Enable clock of port b
 /**************************************************************************/
 
 I2C1_CR2=0x00000008;//APB set to 8MHZ (other way 0b001000)
 I2C1_CR1_bit.ACK=1;//Enable Acknowledgement(Acknowledge returned after a byte is received (matched address or data)
 I2C1_CCR_bit.F_S=0;//Standard mode 0 /Fast mode 1
 /* In Sm mode, to generate a 100 kHz SCL frequency: If FREQR = 08, TPCLK1 = 125 ns so CCR must be programmed with 0x28(0x28 <=> 40d x 125 ns = 5000 ns.)*/
 I2C1_CCR_bit.CCR=0x28;
 /*In Sm mode, the maximum allowed SCL rise time is 1000 ns.If, in the I2C_CR2 register, the value of FREQ[5:0] bits is equal to 0x08 and
 TPCLK1= 125 ns therefore the TRISE[5:0] bits must be programmed with 09h */
 I2C1_TRISE=0x09;//TRISE[5:0] must be configured only when the I2C is disabled (PE = 0).Thaths why i write it before enabling PE of I2C1_CR1
 I2C1_CR2_bit.ITBUFEN=1;//this will enable flag for Tx buffer emepty,Rx buffer not empty
 I2C1_CR2_bit.ITEVTEN=1;//this will enable flag for SB(start bit sent when Master),stop bit received when slave(STOPF)
 // I2C1_CR1_bit.PE=1;//Peripheral Enable Register
 I2C1_CR1_bit.START=1;//Start/Repeated Start
 while(!I2C1_SR1_bit.SB);//wait for 
 //I2C1_DR=(0x20<<1)|(0x00000000);//send address and than write(Master Transmitter)
 I2C1_DR=0x40; 
 I2C1_CR1_bit.PE=1;
}
 
void delay(void)
{
int i = 1000000; /* About 1/4 second delay */
while (i-- > 0)
asm("nop");
}

 Note: I have checked the output with a logic analyzer its only displaying logic high.