STM32F3 ADC and DMA Regular conversion and sequence transfer counts

Forum|Forum|6 years ago
July 5, 2020
1 reply
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I am still having some issues with my STM32F334x8 and ADC DMA regular sequencing....

I am having ADC1 OVR flag set and am trying to use the IRQ which is successfully firing on IRQ but still need to understand how the sequencing and synchronization works with DMA a bit better.

OK, so seeing that DMA_CNDTRx is R/W, I can just write 7 to this register when disabled to reset that inside my OVR IRQ...

Now, how do I read or change the SEQ Sequence in the ADC1 peripheral to a known value ?

Does simply disabling the ADC and Re-enabling it reset the sequence count ? Would be nice to know where it is at but maybe that is not readable or writable ?

This topic has been closed for replies.

Best answer by Gudgel.boB

Figured it out.

Thank you to Eddie's STM32 videos for pointing out to me that the L[3:0] number if sequences to go through with a value of 0000 really means 1 (one) conversion !!!!

https://youtu.be/8lmujnLuJrQ?t=352

I had mistakenly thought that setting L[3:0] to 7 meant to sequence 7 registers and so it did NOT match the number of transfers programmed into DMA1 channel 1 and so that was why my DMA1 output array of ADC1 values did NOT appear in the same positions all the time. Reducing L[3:0] to 6 fixes this problem.

Gudgel.boBAuthorBest answer

Senior

Figured it out.

Thank you to Eddie's STM32 videos for pointing out to me that the L[3:0] number if sequences to go through with a value of 0000 really means 1 (one) conversion !!!!

https://youtu.be/8lmujnLuJrQ?t=352

I had mistakenly thought that setting L[3:0] to 7 meant to sequence 7 registers and so it did NOT match the number of transfers programmed into DMA1 channel 1 and so that was why my DMA1 output array of ADC1 values did NOT appear in the same positions all the time. Reducing L[3:0] to 6 fixes this problem.

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