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Sleep
Sleep
Associate II
May 4, 2020
Question

The CKMODE bit becomes 0 after changing the setting values of the OVSE bit or OVSR bit in ADC_CFGR2 register.

  • May 4, 2020
  • 2 replies
  • 964 views

The CKMODE bit becomes 0 after changing the setting values of the OVSE bit and OVSR bit of ADC_CFGR2.

Therefore, the clock frequency of ADC exceeds Max32MHz.

Is it a malfunction of STM32G071?

I am very in trouble.

If you have any countermeasures, please let us know.

This topic has been closed for replies.

2 replies

TDK
TDK
May 4, 2020

Changing OVSE/OVSR should not affect CKMODE. Post your code. Ensure you're adhering to the requirements for changing these bits. For CKMODE, periphal must be disabled.

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waclawek.jan
waclawek.jan
Super User
May 4, 2024

Hi @Sleep ,

I know this is an old thread, but I wonder, how did you cope with this problem?

Thanks,

JW

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