[STUSB4500] Vbus_EN_SNK behaviour in single power path application

​Hello,

It is normal that a classic negotation starts with a 5V, before rising up eventually to a higher voltage.

Nevertheless, it is true that for some applications, inrush current during transition phase could be detected as too high by the source.

The solution would be to limit the current during transition phase:

• By embedded current limitation, but most of the time, SINK chipset does not include any current control (like STUSB4500)
• By controlling the current from the SINK application (by the Host) during negotiation phase.

Could you provide a bloc diagram of your application ? To understand what is connected behind the MOS, and if there is a way to implement a control of STUSB4500 through I2C link.

What is the size of your large capacitive load ? Have you tried to add a coil after the MOS to limit inrush current ?

ATTACH  is not driven exactly as EN_SNK: it is a "logical signal" whereas EN_SNK is purely analog.

Most of the time, both are at the same level, but it could happen some exception where EN_SNK is disabled whereas ATTACH is still active.

If you want to communicate directly, please send a mail to smart-grid-emea@st.com

Hello Didier,

the schematic is exactly the same as in your EVAL-SCS001V1 reference design; capacitive load after the MOS is about 300uF.

Ok, it's a bit high, but I don't understand how EVAL-SCS001V1 can work... unless the load is purely resistive, the inrush current is unavoidable when the source changes the bus voltage and the load switch is already active.

Ideally, I would like to have a pin that signals when ANY of the 3 contract is in place. And activate the MOS afterwards (and its soft-start will limit the current)

Right now, I can use POWER2 to signal a contract with PDO2, POWER3 to signal a contract with PDO3. I’m also using GPIO to signal if 5V@3A is available, but actually I found no way to signal that PDO1 contract is in place.

That is the reason why I assumed that VBUS_EN_SNK was an OR between the 3 possible PDOs, and not a Vbus >=5V indicator.

Is it possible to configure a pin with such behavior, maybe using I2C?

VBUS_EN_SNK will act differently if the STUSB4500 is configured as passive device (USB_COMM_CAPABLE=0)?

Can I use I2C to query the STUSB4500 about the PDO status? Unfortunately I did not find any clear documentation about the available I2C registers.

Regards,

Alessandro.

​Hello Alessandro,

Some user guide to read STUSB4500 registers should be put on st.com soon.

But of course, it requires a µcontroller to read the registers and act consequently.

Is your application able to reduce the current during a while, if it is aware that we are in a negotiation phase ?

By the way, I have tested your use case with a 330µF as a load, and with STUSB4710 (EVAL ISC004V1) on SOURCE side, but I was not able to reproduce your issue.

I will try with other values, but unfortunately I will not be able to perform any test next week.

The GPIO feature can not be programmed, as it is a full-HW chipset.

Regards,

Didier

Hello Didier,

I'm using a commercial PC-board for the source; employed chip is TPS25741a.

Slew rate during the voltage change is approx 30 mV/µs, that is about the maximum allowable by the USB-PD standard.

This slew rate, combined with my load capacitor gives a calculated inrush current of 9 A. I cannot find a specification on the maximum allowable current during this phase, thus I conclude that is equal to the contracted current.

I guess your source chip is applying a softer voltage change and thus you don't have any current limit protection issue.

My application is not able to reduce the load; DC/DC converters that follow the capacitive load are already OFF during the negotiation phase.

The only load seen during this phase is the 330 µF cap.

I have a microcontroller connected to the STUSB4500; it would be nice to have a user guide that clearly explain registers content.

Regards,

Alessandro.