BUG: CubeMX-generated code fails to properly initialize PLLI2S, MCO2, etc.
- October 4, 2019
- 9 replies
- 3320 views
Latest CubeMXIDE, code for F437. IOC to reproduce bugs attached. Here's the clock configuration:

MCO2 required is 50MHz (for LAN8742A).
Clock diagram shows PLLI2S is used to generate 50MHz from external 12MHz crystal /8,
using *100 / 3, then PLLI2SCLK is fed to MCO.
Bug #1
The generated SystemClock_Config routine contains the following:
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_PLLI2S;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 100;
PeriphClkInitStruct.PLLI2S.PLLI2SR = 3;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)Unfortunately, with these inputs,
the HAL_RCCEx_PeriphCLKConfig routine does absolutely nothing!
PLLI2S is neither set up nor enabled.
The idiotic function just happily returns HAL_OK after doing nothing.
Bug #2:
The CubeMX graphic does not show the output frequency of PLLI2S or PLLCLK
Bug #3:
Updating the PLL2IS x value to 200 fails to update the derived values.
@Markus GIRDLAND - Can you please confirm you can reproduce all 3 bugs and corresponding tickets are opened?
Is there a HAL or LL call that will actually set up PLL2IS properly ???
Or should I just give up on HAL/LL stuff???
For now I've just patched up the STM code to get things working (patched file attached).
Thanks!
Best Regards, Dave
