Lasts two small widgets from here used 28 and 32 lead UFQFPN, physical size, including pin escape being the strongest driver. Wafer scale being a bridge too far for manufacturability. And debug and test being strong secondaries.

Of the low pin count offerings to date, the inability to escape a UART or two being significant frustrations.

Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..

Uwe Bonnes

Chief

The G0/4 datasheet mention " Internal 16 MHz RC with PLL option (±1 %)" versus other "Internal 16 MHz factory-trimmed RC (±1%)" . However the reference manuals do not mention any PLL control on HSI16. Has anybody more insight?

waclawek.janAuthor

Super User

Sounds like a product of some marketing mind. IMO it reads as "HSI can be source to PLL".

Btw. the G0 were supposed to be the next generation F0, but they somehow miss the price point.

JW

Tesla DeLorean

Guru

>>several IO pads bonded together onto one pin

Basically solving with bond wire what could have been achieved with better foresight on the AF pin mux planning side.

A data logger would probably want to escape SD/MMC on a package with less than 64-pins

Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..

waclawek.janAuthor

Super User

Officially announced yesterday https://www.st.com/content/st_com/en/about/media-center/press-item.html/n4188.html

JW

Ozone

Principal

I experienced some demand for such small "gadget" MCUs. In the end, it were usually MC PICs or Atmels.

I see it almost entirely aimed at the 8-bit replacement market (which is a mass market), where price trumps everything.

Sign up

Login with SSO here:

Login to the community

Login with SSO here: