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BKess
BKess
Associate
July 2, 2019
Question

S2-LP trying to get CSMA/CA working

  • July 2, 2019
  • 2 replies
  • 931 views

Hi everyone,

I am trying to set up CSMA/CA on the S2-LP.

Depending on the rssi threshold (RSSI_TH) it may be functional or not.

If I set RSSI_TH very low, data packages are not transmited and I get the interrupt "Max.number of back-off during CCA". As expected.

However, if I set RSSI_TH higher the S2-LP stays in RX state. Even though carrier sense is 0 it just does not send the package. Sometimes after waiting for minutes I get the interrupt "Valid preamble detected", and afterwards the package is transmitted, followed by interrupt "TX data sent".

Why does the S2-LP send the package only after receiving a valid preamble? CSMA should send the package immediately if the channel is free i.e. carrier sense=0, right?

Thanks for any hints and help.

    This topic has been closed for replies.

    2 replies

    Winfred LU
    Winfred LU
    ST Employee
    July 8, 2019

    Hi Beat,

    Right. When the channel is free (carrier sense 0), S2-LP sends the packet after continuously checking the channel for Tlisten cycles of CCA.

    Higher or lower threshold does not affect the CSMA procedures, which means It does not matter what's the threshold value.

    My best guess would be possibly some other parameters (registers) are configured differently when you tested with higher threshold ?

    Bet Regards,

    Winfred

    BKess
    BKessAuthor
    Associate
    July 9, 2019

    Hi Winfried,

    Thanks for your reply.

    No, once I set the basic registers, I did not change them, except playing with RSSI_TH.

    Below you find my register settings, as I picked them from my code. Perhaps I set something wrong?

    switch (mode) {

    case S2LP_BaseConfiguration_Mode_25MHz_125k:

    tmp[0] = 0x44; /* reg. SYNT3 (0x05) */

    tmp[1] = 0x57; /* reg. SYNT2 (0x06) */

    tmp[2] = 0x0A; /* reg. SYNT1 (0x07) */

    tmp[3] = 0x3D; /* reg. SYNT0 (0x08) */

    tmp[4] = 0xC2; /* reg. IF_OFFSET_ANA (0x09) */

    tmp[5] = 0xC2; /* reg. IF_OFFSET_DIG (0x0A) */

    S2LPSpiWriteRegisters(0x05, 6, tmp);

    tmp[0] = 0x47; /* reg. MOD4 (0x0E) */

    tmp[1] = 0xAE; /* reg. MOD3 (0x0F) */

    tmp[2] = 0xA9; /* reg. MOD2 (0x10) */

    tmp[3] = 0x06; /* reg. MOD1 (0x11) */

    tmp[4] = 0x48; /* reg. MOD0 (0x12) */

    tmp[5] = 0x80; /* reg. CHFLT (0x13) */

    S2LPSpiWriteRegisters(0x0E, 6, tmp);

    tmp[0] = 0x55; /* reg. ANT_SELECT_CONF (0x1F) */

    tmp[1] = 0x00; /* reg. CLOCKREC2 (0x20) */

    S2LPSpiWriteRegisters(0x1F, 2, tmp);

    tmp[0] = 0x00; /* reg. PCKTCTRL3 (0x2E) */

    tmp[1] = 0x01; /* reg. PCKTCTRL2 (0x2F) */

    tmp[2] = 0x40; /* reg. PCKTCTRL1 (0x30) */

    S2LPSpiWriteRegisters(0x2E, 3, tmp);

    tmp[0] = 0x91; /* reg. SYNC3 (0x33) */

    tmp[1] = 0xD3; /* reg. SYNC2 (0x34) */

    tmp[2] = 0x91; /* reg. SYNC1 (0x35) */

    tmp[3] = 0xD3; /* reg. SYNC0 (0x36) */

    S2LPSpiWriteRegisters(0x33, 4, tmp);

    tmp[0] = 0x01; /* reg. PROTOCOL1 (0x3A) */

    S2LPSpiWriteRegisters(0x3A, 1, tmp);

    tmp[0] = 0x40; /* reg. FIFO_CONFIG3 (0x3C) */

    tmp[1] = 0x40; /* reg. FIFO_CONFIG2 (0x3D) */

    tmp[2] = 0x40; /* reg. FIFO_CONFIG1 (0x3E) */

    tmp[3] = 0x40; /* reg. FIFO_CONFIG0 (0x3F) */

    tmp[4] = 0x41; /* reg. PCKT_FLT_OPTIONS (0x40) */

    S2LPSpiWriteRegisters(0x3C, 5, tmp);

    tmp[0] = 0x4C; /* reg. CSMA_CONFIG3 (0x4C) */

    S2LPSpiWriteRegisters(0x4C, 1, tmp);

    tmp[0] = 0x1D; /* reg. PA_POWER8 (0x5A) */

    S2LPSpiWriteRegisters(0x5A, 1, tmp);

    tmp[0] = 0x07; /* reg. PA_POWER0 (0x62) */

    tmp[1] = 0x01; /* reg. PA_CONFIG1 (0x63) */

    tmp[2] = 0x8B; /* reg. PA_CONFIG0 (0x64) */

    tmp[3] = 0xD4; /* reg. SYNTH_CONFIG2 (0x65) */

    S2LPSpiWriteRegisters(0x62, 4, tmp);

    tmp[0] = 0x55; /* reg. XO_RCO_CONFIG1 (0x6C) */

    S2LPSpiWriteRegisters(0x6C, 1, tmp);

    break;

    };

    // set channel spacing according to S2-LP datasheet rev.5 equation 6

    radio_interface_write_value(S2LP_REGISTER_CHSPACE, (100000UL* (1 << 15) / 25000000UL)); // 100kHz channel spacing

    radio_interface_write_value(S2LP_REGISTER_PCKTLEN1, 0);

    radio_interface_write_value(S2LP_REGISTER_PCKTLEN0, 0);

    // VCO calibration off

    radio_interface_write_value(S2LP_REGISTER_VCO_CONFIG, 0x03);

    radio_interface_write_value(S2LP_REGISTER_VCO_CALIBR_IN2, ((0x07) << 4) | (0x07));

    radio_interface_write_value(S2LP_REGISTER_VCO_CALIBR_IN1, 0x45);

    radio_interface_write_value(S2LP_REGISTER_VCO_CALIBR_IN0, 0x45);

    // CSMA/CCA

    #define CSMA_BU_PRESCALER 1

    #define CSMA_CCA_PERIOD   0

    #define CSMA_CCA_LEN      3

    #define CSMA_NBACKOFF_MAX 4

     radio_interface_write_value(S2LP_REGISTER_CSMA_CONF1, (CSMA_BU_PRESCALER <<2) | CSMA_CCA_PERIOD);

     radio_interface_write_value(S2LP_REGISTER_CSMA_CONF0, (CSMA_CCA_LEN<<4) | CSMA_NBACKOFF_MAX);

    radio_interface_write_value(S2LP_REGISTER_RSSI_TH, 0x2e); // RSSI_TH = -100dBm

    set_register_flags(S2LP_REGISTER_PM_CONF0, 1); // Set Sleep Mode

    set_register_flags(S2LP_REGISTER_PROTOCOL1, (1 << 2)); // Enable CSMA

    radio_interface_send_command(S2LP_COMMAND_TX); // Set TX operation mode

    Terms & ConditionsAccessibility statement