Skip to main content
Bernard1
Associate II
February 12, 2019
Question

CAN Bus issue with STM32F302

  • February 12, 2019
  • 2 replies
  • 912 views

I am porting a code base that used to work well on the STM32F103 series.

The problem I have with the STM32F302VE seems to be related to the CAN FIFO's. What works:

1) CAN registers are working correctly

2) Initialization is executed normally

3) Receive interrupts are triggered when frames are on the bus

The problems I have are:

1) Can't read anything meaningful from the receive FIFO (RX data is all 0x00)

2) Attempt to transmit create a Hard Fault Error when the mailbox is written to

It looks like the FIFO are not enabled or not clocked. I cannot see anything specific to the CAN FIFO's beyond the enable and clock bit for the whole CAN subsystem.

Any idea?

This topic has been closed for replies.

2 replies

Bernard1
Bernard1Author
Associate II
February 12, 2019

The TX issue has been resolved. In the new CAN API:

HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox)

pTxMailbox is (obviously) a pointer. I was passing a FIFO number.

When getting a hardfault, it is very useful to do:

*(uint8_t *)0xE000E008 |= (2);

This sets the Auxiliary Control Register to disable the write buffer and allows you to detect where the fault is happening.

Bernard1
Bernard1Author
Associate II
February 13, 2019

The receive issue also went away when forcing NORMAL mode (as opposed to SILENT). It seems that the simulator used for this development behave differently at different time.

Sorry for the false alarm.