As in many examples I found online the clocks are configured with a function void SystemClock_Config(void). To make the display work, I copied the function from an example. It caused the error in the SD-Ram write process. As I read from the comments, the SD-RAM can be operated up to a system clock of 200MHz. If I understood it correctly, mine has been set to 216MHz. Now I have the following clock configuration function:
void SystemClock_Config(void)
{
/**Macro to configure the PLL multiplication factor*/
__HAL_RCC_PLL_PLLM_CONFIG(16);
/**Macro to configure the PLL clock source*/
__HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSI);
/**Configure the main internal regulator output voltage*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
//RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
HAL_StatusTypeDef ret = HAL_OK;
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN =380;// old value: 400
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 8;
ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
if(ret != HAL_OK){
_Error_Handler(__FILE__, __LINE__);
}
/* Activate the OverDrive to reach the 200 MHz Frequency */
ret = HAL_PWREx_EnableOverDrive();
if(ret != HAL_OK){
_Error_Handler(__FILE__, __LINE__);
}
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6);
if(ret != HAL_OK){
_Error_Handler(__FILE__, __LINE__);
}
/**Configure the Systick interrupt time*/
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
/**Configure the Systick*/
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}
To make the diplay and RAM work, I changed the RCC_OscInitStruct.PLL.PLLN from 400 to 380. I guess more or less: PLLN = 400: 216MHz, so PLLN=380: 200MHz.
Find it difficult to read from the TRM which PLL is now responsible for what. If someone has a better solution, I would be interested in it. This has now solved the problem for me temporarily.
