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eBirdman
eBirdman
Senior
August 24, 2018
Question

When choose the same timer / different channels vs another timer?

  • August 24, 2018
  • 3 replies
  • 3225 views

Hello, I am seeking more clarity on the usage of different STM32 timers vs possible usage of a different channel in the same timer when there is need to share resources in MCU. My chosen Cortex M4 MCU has many timers but sharing pins for input capture and output PWM waveforms with other GPIO pins shrinks their availability.

Can somebody provide (or point to the available resource) a clear criteria on which timer usages can be assigned to the same timer but different channels and when sharing the same timer becomes impossible? (Note: the difference between advanced timers and general purpose is not important here as their differences are well explained in STM documents).

Some examples (but not to limit the more general scope of my question):

Multiple timers needed to count down and trigger interrupts/DMA: one with 1 uSec interval, the others with 1mSec intervals ? can they share the same timer but different channels?

Few timers are in input capture mode to calculate pulse period of each, each counts from their respective GPIO pin inputs, clocking can be the same, - can they share the same Timer but different channels?

and so on............

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    3 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    August 24, 2018

    There's only a single counting element in the TIM, so when different frequencies are involved you want to use a different TIM so you don't have to babysit the phase angles via CCRx in interrupts.

    For time stamping, one TIM, maximal count, 4 sources can be timestamped, likely to run out of DMA resources first.

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    eBirdman
    eBirdmanAuthor
    Senior
    August 24, 2018

    Thank you,

    as regard to my 2nd example, the answer is - the same timer is OK, but as for my 1st example : what "different frequencies" do you mean ? Clocking (CK_CNT) or time interval?

    I don't see problem having the same clock CK_CNT (for ex. 48mHz?) but each channel's capture/compare register will trigger timeout at different intervals... or is there a problem ?

    waclawek.jan
    waclawek.jan
    Super User
    August 24, 2018

    Clive meant the period, i.e. CK_CNT / (ARR+1). It's a quite often repeated request to output waveforms with different frequencies from the various channels of one timer.

    There is another constraint if you want to use DMA, the DMA triggers in many timers are usually ORed together, so you then you can't use multiple DMAs triggered from several channes of one timer.

    And, as you've said, the pins multiplexing constraints represent another obstacle to "fully utilizing" the timers' acpabilities.

    JW

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