STM32F4 compiler

Posted on April 24, 2014 at 13:45

does anybody have running gcc with simd for Cortex-M4 ?

Can't say I've tried, but the hardware FPU stuff seems to work. Perhaps there are some more GNU/GCC centric forums or lists?

Posted on April 24, 2014 at 13:56

does anybody have running gcc with simd for Cortex-M4 ?

 

I'm not aware that the M4 supports any SIMD instructions.

The (optional) NEON unit on Cortex A devices does.

Posted on April 24, 2014 at 16:41

Hi

The programmers reference manual says that it does.

https://my.st.com/sites/xnet_docs/drc/drc.aspx?documenttype=Programming%20Manual&prodtype=SS&prodid=1577&count=2

It only works on some Mult instructions.

Not sure how much performance gain it is going to get!?!

Posted on April 24, 2014 at 17:39

Have a look at core_cm4_simd.h in CMSIS directory of your toolchain.

[EDIT] Apparently gcc does use ''natively'' at least some of them, e.g.

uint32_t aa(int32_t x, int32_t y) {

  int64_t acc;

  acc = x;

  acc += (int64_t) x * y;

  return (acc >> 32);

}

gcc 4.7.0 compiled into

0800019c <aa>:

 800019c:    17c3          asrs    r3, r0, #31

 800019e:    4602          mov    r2, r0

 80001a0:    fbc1 2300     smlal    r2, r3, r1, r0

 80001a4:    4618          mov    r0, r3

 80001a6:    4770          bx    lr

[EDIT2] Ah, smlal is not considered SIMD, sorry... :)

JW

Posted on April 24, 2014 at 20:31

Albeit even ARM talks about ''optimized SIMD ... instructions'', I view this as a rather overstretched definition of SIMD.

Just compare this with NEON or other MME/GPU unit, doing 32 ... 512 identical operations in parallel in a single instruction.

Posted on April 24, 2014 at 21:11

Don't know, I'm no hardware designer. I would have to use a search engine, too.

NXP had produced LPC8xx Cortex-M0 MCUs in DIL package lately, so they might have QFP, too.

Recently I am dealing with the x86 compatible embedded world, where everything is BGA...