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mail2
mail2
Associate III
October 21, 2013
Question

stm32f4 interrupt pipeline hazard

  • October 21, 2013
  • 3 replies
  • 3830 views
Posted on October 21, 2013 at 10:26

Hello again,

I have learned that this: 

void DMA2_Stream3_IRQHandler() 
{
// Test if DMA Stream Transfer Complete interrupt
if (DMA_GetITStatus(DMA2_Stream3, DMA_IT_TCIF3)) 
{
DMA_ClearITPendingBit(DMA2_Stream3, DMA_IT_TCIF3);
}
}

is danger on a Cortex-M3/4. The Interrupt can be reentered immediately due to some pipline issues. Is it enough to insert two nops to clear this situation? 

void DMA2_Stream3_IRQHandler() 
{
// Test if DMA Stream Transfer Complete interrupt
if (DMA_GetITStatus(DMA2_Stream3, DMA_IT_TCIF3)) 
{
DMA_ClearITPendingBit(DMA2_Stream3, DMA_IT_TCIF3);
}
__NOP();
__NOP();
}

Currently it works for me, but does it work under all situations? Martin
    This topic has been closed for replies.

    3 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    October 21, 2013
    Posted on October 21, 2013 at 14:32

    What is the point of such a routine? If you do any read/write on memory it will fence the interrupt clearing write. So increment a variable, write a flag, anything should be sufficient.

    https://community.st.com/0D50X00009XkYyUSAV

     

    https://community.st.com/0D50X00009XkZ4PSAV

     

    Edit: Fixed DEAD LINKs, original post from Oct 21, 2013

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    mail2
    mail2Author
    Associate III
    October 21, 2013
    Posted on October 21, 2013 at 16:39

    Hi Clive,

    These where dummies, so i can't forget one and i can keep die handler happy while coding and testing. These costs me a few hours of debugging for nothing before i found my fault :)

    Maybe a big TODO comment, these nops or a __DMB() is better in future (it seems that Keil-C is able to optimize nop() avay on higher optimization settings)

    Martin

    Tesla DeLorean
    Tesla DeLorean
    Guru
    October 21, 2013
    Posted on October 21, 2013 at 16:47

    Writing or incrementing a volatile variable should be quite adequate to force in-order completion. 

    volatile int jiffies;
void DMA2_Stream3_IRQHandler()
{
// Test if DMA Stream Transfer Complete interrupt
if (DMA_GetITStatus(DMA2_Stream3, DMA_IT_TCIF3)) // Qualify
{
DMA_ClearITPendingBit(DMA2_Stream3, DMA_IT_TCIF3); // Clear Early
// Do something
jiffies++;
}
}

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