DMA SDIO TX underrun error

Forum|Forum|12 years ago
March 8, 2014
7 replies
1322 views

Posted on March 08, 2014 at 14:46

I got the DMA working fine with SDIO , i can read multiple blocks ok , but when i try write multiple blocks , i get TX underrun error in the SDIO , and i can also see that there is a FIFO error in the DMA , which i do not see when reading from the card ......... any suggestions ?

#lmgtfy:-firmware-library

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Tesla DeLorean

Guru

Posted on March 08, 2014 at 15:40

Have you reviewed ST's implementation for SDIO?

Writing is a little more problematic than reading, there are two FIFO's, one in the DMA, and one in the SDIO (128 Byte 32x4). It's important to wait for the SDIO to empty before the command actually completes, and this can be some time after the DMA TC. The FIFO on the DMA side is likely it be sensitive to settings size/alignments, and the alignment/bandwidth of the data.

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zeros_and_ones1991Author

Associate III

Posted on March 08, 2014 at 15:50

I Know what u saying clive , but im not using the FIFO of the DMA , and i do not think i should have problem with the FIFO of SDIO , cuz im making the SDIO as the flow controller , ........ where is this documentation u r talking about ? ....... and Have u encountered that problem ? ..... what do u suggest ?

Tesla DeLorean

Guru

Posted on March 09, 2014 at 01:41

IMPLEMENTATION != DOCUMENTATION.....Review something that works.....Conveys details, nuances and methods which are hard to express by a technical writer who didn't design/work with the silicon/software....Not using FIFO mode for the DMA?..... Perhaps you should be using FIFO/BURST mode if you understood the tight delivery deadlines, and reviewed other solutions.....What's the SDIO peripheral supposed to do with the clock signal if the delivery of data stalls out?.....Does the throttling occur at a block level?.....Underrun, doesn't that infer an inability of your data source to supply it sufficiently rapidly when it needs too?

STM32F4xx_DSP_StdPeriph_Lib_V1.3.0\Project\STM32F4xx_StdPeriph_Examples\SDIO\SDIO_uSDCard

STM32F4xx_DSP_StdPeriph_Lib_V1.3.0\Utilities\STM32_EVAL\STM3240_41_G_EVAL\stm324xg_eval_sdio_sd.c

STM32F4xx_DSP_StdPeriph_Lib_V1.3.0\Utilities\STM32_EVAL\STM3240_41_G_EVAL\stm324xg_eval.c

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Amel NASRI

ST Technical Moderator

Posted on March 10, 2014 at 13:30

Hi Muhammad,

In

http://www.st.com/web/en/resource/technical/document/application_note/DM00046011.pdf

, there is a note saying the following:

If the user enables the used peripheral before the corresponding DMA stream, a “FEIF�?

(FIFO Error Interrupt Flag) may be set due to the fact the DMA is not ready to provide the first required data to the peripheral (in case of memory-to-peripheral transfer).

Check if you are in similar case.

-Mayla-

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