DMA triggered DMA

Posted on March 05, 2014 at 12:04

You should really start doing something like this with thorough reading the fine manual.

> What I know from the reference manual is that you should not configure a DMA stream while it is enabled.

It's not that you shouldn't - you can't.

But it's kind of moot, since when NDTR reaches zero, the stream disables itself, so you would need to reenable it by writing one to DMA_SxCR.EN. But prior to that, you need to clear the respective flags in DMA_LISR/DMA_HISR by writing to DMA_LIFCR/DMA_HIFCR; but these are not located consecutively (except for Stream0), so you can't do that in one DMA. And all other registers for a stream lie beyond DMA_SxCR, so they can't be written in one DMA either.

I would do something different. As you need some trigger for the memory-to-GPIO transfer anyway (for which you need DMA2, see other recent DMA-to-GPIO threads), you will probably use a timer for that, setting it to output a pulse at the 1MHz pace. Now you can chain that timer with another one, which would gate it so that you achieve the required bursts of DMA-to-GPIO transfers.

Not trivial at all, but IMO doable.

JW