Relationship between RCC_ADCCLKConfig() and conversion time

Posted on May 09, 2014 at 11:24

I need to convert at the maximum ADC rate for a 32f303x ie 200nS.

What is the relationship between (say)

RCC_ADCCLKConfig

(

RCC_PCLK2_Div6

);

and the actual conversion speed?

This topic has been closed for replies.

Associate II

Posted on May 12, 2014 at 13:47

Hi

Have you read the RCC section and the ADC section of the reference manual?

It is not clearly explained but my understanding is that :

CKMODE in 'ADC common control register' selects which clock drives the ADC.

(either from the PLL or from APB)

The clock can then be sub-divided down (if required).

To get max conversion rate, probably need max CPU clock rate (72Mhz)

Clock ADC from PLL

No sub division.

(I could be wrong - please check yourself)

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