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klaus2
klaus2
Associate III
March 3, 2016
Question

Split EXTI4_15_IRQHandler into smaller ISRs possible ?

  • March 3, 2016
  • 5 replies
  • 1202 views
Posted on March 03, 2016 at 14:48

Hi there,

is it possible to divide the EXTI4_15_IRQHandler into smaller groups of EXTI Lines ? For example EXTI0_1_IRQHandler is responsible for EXTI line 0 and 1 and EXTI2_3_IRQHandler for EXTI line 2 and 3. But all remaining lines EXTI lines 4 to 15 will be handled in one ISR.

Thank you

K

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    5 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    March 3, 2016
    Posted on March 03, 2016 at 15:20

    No, they are designed for lower priority interrupts, load the status register and crack the bits into subfunction or compound if statements. That would be reasonably efficient.

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    klaus2
    klaus2Author
    Associate III
    March 3, 2016
    Posted on March 03, 2016 at 15:51

    Thank you for your fast reply! The background of my question is... I have one line which should be handled as ext. IRQ e.g.Pa5. I have another line e.g. Pa10 where I want to use only the flag inside the EXTI->PR which is set at every rising edge but it should not jump into the ISR and back because the frequency at Pa10 is about 100kHz.

    I think I have to do some pin swapping...

    Tesla DeLorean
    Tesla DeLorean
    Guru
    March 3, 2016
    Posted on March 03, 2016 at 16:46

    Ok, so don't have EXTI10 generate an interrupt, the mask is downstream from the edge detection. I don't see how breaking into multiple IRQ Handlers solves or addresses this.

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    klaus2
    klaus2Author
    Associate III
    March 3, 2016
    Posted on March 03, 2016 at 17:02

    ''EXTI'' writes into to EXTI->PR only when IRQ-mode is enabled. When the corresponding IRQ inside the NVIC is not enabled the EXTI->PR will be written but no jumps to ISRs ?! The point is that EXTI0_1 and EXTI4_15 can be separately en/disabled inside the NVIC.

    Tesla DeLorean
    Tesla DeLorean
    Guru
    March 3, 2016
    Posted on March 03, 2016 at 19:25

    That's really not my read of the documentation, at least for the F4, both how the register is specified, and the gates diagramed. Which STM32 specifically are we talking about here, and can it be an Event and not an Interrupt?

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