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karbach
karbach
Associate II
February 6, 2015
Question

128Mbit SDRAM Configuration

  • February 6, 2015
  • 3 replies
  • 896 views
Posted on February 06, 2015 at 15:02

I'm developing a prototype using STM32F4 - to start a first prototype I started to write the software for the STM32F429I-DISCO board. I used clive's init code to drive the 64Mbit SDRAM onboard - it works like a charm. Now on the prototype I will need 128Mbit so I had a professional de-solder the original memory chip and exchanged it for a 128Mbit Type: AS4C8M16S.

Both chips are pin-compatible and the only differences I can spot are concerning timing and adressing. This chips has 9 Column Adress lines while the other had only 8.

The significant change was:

FMC_Bank5_6->SDCR[0] = 0x00002800;

to

FMC_Bank5_6->SDCR[0] = 0x00002801;

When I run the application the memory is configured and I get into main but then it seems to crash. In my memory view I can see some (weird) values in the memory. How do I have to adjust the timing to get this RAM to work?

Thanks in advance.
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    3 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    February 6, 2015
    Posted on February 06, 2015 at 19:15

    Generally all the timing parameters have a similar naming convention.

    What you have to do is consider the speed at which you are running the part/bus, and quantify the timing in cycles of that clock (say 84 or 90 MHz, vs the 100,133,166 MHz of the part)

    90 MHz -> 11.11 ns cycles, if something needs >=50ns that would be 5 cycles

    Also review the refresh period, vs the rows it has to traverse, vs the clock speed.

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    karbach
    karbachAuthor
    Associate II
    February 9, 2015
    Posted on February 09, 2015 at 09:17

    The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6gr&d=%2Fa%2F0X0000000btI%2FwuQX0mA606LVMWwttl7Ttx268wM4TbeZRy5TZmRO1uw&asPdf=false
    karbach
    karbachAuthor
    Associate II
    February 9, 2015
    Posted on February 09, 2015 at 09:34

    Edit: when I say ''crashing'' I mean the hard fault handler is called.

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