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John Hite
John Hite
Associate III
June 6, 2017
Solved

Initialization of ETH->MACMIIAR

  • June 6, 2017
  • 2 replies
  • 1079 views
Posted on June 06, 2017 at 18:20

Device: STM32F437

In file  stm32f4x7_eth.c on line 333 there is the statement:

    tmpreg = ETH->MACMIIAR;

However, nowhere do I find an initialization of this value before this access. And checking the value after breakpointing it is zero. But then I know very little about ethernet in general.

Thanks,

jh

    This topic has been closed for replies.
    Best answer by waclawek.jan
    Posted on June 06, 2017 at 18:48

    ETH->MACMIIAR is not a *value* but an ETH register, described in detail in MAC register description subchapter of ETH chapter in RM0090. It's one of the two registers (the other being ETH_MACMIIDR) through which the PHY chip's registers are programmed and queried, via its two-wire MDIO (a.k.a. SMI) interface.

    As such, it does not have an 'initialization value' either, as its fields are being dynamically updated, both by the application (most fields) and hardware (MB flag).

    But it sounds quite unlikely it will be all zero. I'd say you don't have properly initialized all the three ETH clocks, including proper initialization of pins where the external clocks are input.

    JW

    2 replies

    waclawek.jan
    waclawek.janBest answer
    Super User
    June 6, 2017
    Posted on June 06, 2017 at 18:48

    ETH->MACMIIAR is not a *value* but an ETH register, described in detail in MAC register description subchapter of ETH chapter in RM0090. It's one of the two registers (the other being ETH_MACMIIDR) through which the PHY chip's registers are programmed and queried, via its two-wire MDIO (a.k.a. SMI) interface.

    As such, it does not have an 'initialization value' either, as its fields are being dynamically updated, both by the application (most fields) and hardware (MB flag).

    But it sounds quite unlikely it will be all zero. I'd say you don't have properly initialized all the three ETH clocks, including proper initialization of pins where the external clocks are input.

    JW

    John Hite
    John HiteAuthor
    Associate III
    June 6, 2017
    Posted on June 06, 2017 at 20:57

    Thanks for posting JW and sorry for my poor choice of words.

    But thanks for the clock clue. Clocks were OK before when we had a simple phy. Now we have a Marvell 10 port switch where 2 ports are MII and we are accessing via one of those. The switch is supplying the 25 MHz clocks for itself and the STM's RX and TX clocks.

    Best Regards,

    JH

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