Skip to main content
siddj
Associate III
February 21, 2009
Question

SPI config question

  • February 21, 2009
  • 7 replies
  • 1737 views
Posted on February 21, 2009 at 09:53

SPI config question

    This topic has been closed for replies.

    7 replies

    siddj
    siddjAuthor
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    I am using the SPI1 peripheral on a STM32F103VE device to get A/D conversion values from a 16 bit AD7685 A/D converter. I have the following connections.

    A/D ST-SPI

    SCK SPI1_SCK

    SDO SPI_MISO

    CNV SPI1_NSS

    I had specific questions on how to configure SP1_NSS port. The ST example which uses NSS does not actually configure the GPIO A port pin 4 for NSS.

    It just configures the SPI_NSS as: SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;

    I have just one slave, the A/D, so do I configure the NSS pin as Hardware or Software driven. Also since I am only using the SPI to read values from the A/D should i configure the direction of SPI for 1Line Rx?

    This is what I currently have for the configuration of SPI, I am not getting any data from the A/D so I am thinking that it might have something to do with the N_SS pin.

    SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Rx;

    SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

    SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;

    SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;

    SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;

    SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;

    SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;

    SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_LSB;

    //SPI_InitStructure.SPI_CRCPolynomial = 7;

    Any responses are greatly appreciated.

    siddj
    siddjAuthor
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    Hi, the pin is called, CNV. Earlier it was called CS and now it has more functions so its called CNV but it still would function as a CS.

    What do i do with the NSS pin? Hardware/Software?

    Here is the data sheet for AD7685

    http://www.analog.com/static/imported-files/data_sheets/AD7685.pdf

    Thanks.

    m3allem
    Associate
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    Hi siddj;

    I don't know if the slave-select pin of AD7685 is called CNV, if it is the case, I think that it has to be connected to GND and not to SPI1_NSS, because your A/D is a slave.

    B.R.

    M3allem.

    siddj
    siddjAuthor
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    Thank you for such an elaborate response.

    My board has already been done so I am just working on getting the ADC to talk to my processor.

    1. The VIO pin of the ADC is tied to VDD(3.3V).

    2. CNV is tied to SP1_NSS.

    3. SDO-MISO and SCK-SP1_SCK.

    Since it can send date on either edge i am guessing the CPOL and CPHA configuration does not matter. I have the data size setup to 16 bit and the direction of the SPI transfer is set to be ''SPI_Direction_1Line_Rx'' since I an only receiving data in the master mode. So I am only unsure about the NSS setting. If the NSS pin is driven low, the A/D should start the conversion and send out data. So how should i configure NSS? as hardware or software driven? Also do i need to configure the GPIO pins connected to SP1_NSS(pin A4). I have tried both ways and did not have much luck, still 0's in my data register. LEt me know if there is anything fundamentally wrong in my SPI config.

    I really appreciate your help, thanks!

    jj_it
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    Good that you provided the data-sheet - I downloaded it myself to assist earlier.

    STM32's SPI is not conventional as regards NSS_CS output. (you can read several large posts dealing with this, here)

    To keep things simple - here's my suggestion:

    1) Analog data into your 16 bit ADC is sampled on the ''rising edge'' of CNV. You ''cannot'' achieve this with ''normal'' STM32 SPI set-up!

    2) Tie the ADC chip's SDI pin to Vdd. On the rising edge of CNV (which you provide by a ''non-SPI'' GPIO) the state of SDI is latched - and you enter what is called by A-D ''CS mode.''

    3) Keep CNV high for the period tCONV (0.7 - 3.2 uS). After this - drop CNV signal (to low).

    4) Now you generate 16 rising clock edges - A-D states that data is valid on ''either'' edge - falling edge gives fastest conversion results. (this from Fig. 35)

    Looks like a nice, fast, hi-res chip. I see no real advantage - in fact I see many ''gotchas/complications'' if you try to interface using STM32's SPI. Strongly suggest that you simply ''bit-bang'' - 2 GPIO outputs (CNV & CLK) and 1 GPIO input (SDO). Let us know how this works, please...

    jj_it
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    Don't hate me - as stated previously your attempt to ''master'' STM32's ''arcane'' SPI set-up/operation is delaying & complicating your stated task.

    Again - look carefully @ A-D Fig 35. (I have my staff post such diagrams @ their workstation) This drawing shows that the analog conversion ''starts'' upon the rising edge of CNV. CNV should remain high for the conversion period (tCONV) and then is brought low.

    *** you can not achieve this effect using STM32's SPI operation - imho it is wasteful to even try! ***

    So - change your pin configuration from SPI to ''GPIO push-pull'' for CNV and A-D clk, change to ''GPIO input'' for A-D data output. This should enable you to ''keep'' your pcb routings intact.

    After period tCONV expires you bring CNV low - now you clock the A-D and I bet you data will start marching out of the A-D - and into your STM32.

    Hooking a scope or data analyzer to the A-D data out will comfort/assist. Only ''after'' you have this working with ''bit-bang'' would I revisit the SPI mode/operation. (but who cares - why bother?)...

    siddj
    siddjAuthor
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    *

    1. THE VIO and SDI pin of the ADC is tied to Vdd...sorry