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Kamil Kisiel
Kamil Kisiel
Associate III
January 3, 2018
Question

Some ''additional functions'' of pins not indicated in CubeMX (eg: BOOT1)

  • January 3, 2018
  • 16 replies
  • 3586 views

Posted on January 03, 2018 at 19:25

I recently had a problem in one of our designs that was caused by assigning a GPIO with an external pull-up to PB2 on an STM32F413. It turns out that this pin has the additional function of being BOOT1, so the pullup caused the MCU to be unable to enter the system bootloader mode. I use CubeMX to plan my pin assignments, and this additional function isn't indicated anywhere in the user interface. Yes, I probably should have caught this by cross-referencing the report with the datasheet, but this is definitely an area where CubeMX should be able to help me out.

st.mcu

‌ can you please pass this feedback on to the CubeMX team?

    This topic has been closed for replies.

    16 replies

    Amel NASRI
    Amel NASRI
    ST Technical Moderator
    January 4, 2018
    Posted on January 04, 2018 at 11:06

    Hi

    Kisiel.Kamil

    ‌,

    I agree with you that BOOT1 pin has to be mentioned in CubeMX. Thanks for bringing this issue to our attention, we will take care of fixing it.

    However, I don't understand how pulling-up PB2 leads to enter the system bootloader mode.

    Based on RM0430 and AN2606, bootloader is activated if Boot0(pin) = 1 and Boot1(pin) = 0.

    In your case, if BOOT1 is pulled up and BOOT0 is already 1, then you will boot from Embedded SRAM. In such case, pay attention to relocate the vector table in SRAM.

    If your need to boot from flash in your application, BOOT0 has to be set to 0. BOOT1 value will not matter then.

    -Amel

    To give better visibility on the answered topics, please click on "Best Answer" on the reply which solved your issue or answered your question.
    Tesla DeLorean
    Tesla DeLorean
    Guru
    January 4, 2018
    Posted on January 04, 2018 at 12:35

    Think he says he CAN'T get into the System Loader, not that it does.

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    Kamil Kisiel
    Kamil KisielAuthor
    Associate III
    January 4, 2018
    Posted on January 04, 2018 at 17:08

    Yes exactly. We have a boot switch on the BOOT0 pin to enable the bootloader, but it's causing a boot to embedded SRAM instead.

    Bogdan Golab
    Bogdan Golab
    Lead
    January 4, 2018
    Posted on January 04, 2018 at 22:48

    I verified the issue (lack of indication of BOOTx function) on a few MCU.

    For some MCU which have dedicated pin for BOOTx function (STM32F030F4, STM32F103C8) this label is shown in the GUI.

    In the case of this MCU the BOOT1 function is shared with other PIN functionalities (GPIO, etc) and BOOT1 is not shown. On the other hand the BOOT0 function is dedicated to the pin (not shared) and is shown in the GUI.

    It looks like a bug in CubeMX code and I think it should be fixed because of consequences during the design process when you are unaware of BOOTx functionality (assumed that the CubeMX is definitive source of information of pin functionality allocation).

    Jeanne Joly
    Jeanne Joly
    Associate
    March 6, 2018
    Posted on March 06, 2018 at 11:07

    Hello

    Kisiel.Kamil

    ,

    Regarding the pinout config, the data sheet is our reference. If you have a look to the data sheet for the STM32F413 (

    http://www.st.com/en/microcontrollers/stm32f413vh.html

    ), the PB2 pin is named PB2 and has BOOT1 as additional functions :

    0690X00000609wmQAA.png

    So, the name of this pin is correct on CubeMX and you can find the information of where Boot1 is mapped with the data sheet.

    For other MCUs as STM32F469, the name of the PB2 is PB2_BOOT1 as seen in the data sheet :

    0690X00000609x1QAA.png

    I hope I have answered your question.

    BR. Jeanne

    Kamil Kisiel
    Kamil KisielAuthor
    Associate III
    March 6, 2018
    Posted on March 06, 2018 at 19:58

    No, this absolutely does not address the issue. Look at this screenshot from CubeMX:

    0690X00000609umQAA.png

    Nowhere does it indicate that PB2 has an additional function of being the BOOT1 pin. If you click on a pin which also serves as an ADC input (which is an additional function) that's indicated in the popup menu. But there's absolutely no indication that PB2 also serves as BOOT1. Yes, this can be looked up in the datasheet, but the purpose of the software is to assist you in the design of a pinout for the processor and it's omitting crucial information.

    Jeanne Joly
    Jeanne Joly
    Associate
    March 8, 2018

    Posted on March 08, 2018 at 09:05

    Hello

    Kisiel.Kamil

    ,

    Taking the example of the STM32F469IEHx where PB2 is indicated as BOOT1, you don't have the signal BOOT1 on PB2 as once BOOT1 has been sampled, the corresponding GPIO pin can be freed and used for other purposes :

    0690X0000060A0oQAE.png

    In the <LINK NO LONGER ACTIVE>

    , the boot configuration is well described.

    BR. Jeanne

    Jeanne Joly
    Jeanne Joly
    Associate
    March 8, 2018
    Posted on March 08, 2018 at 18:29

    Hello all, 

    A further study on the pin names that are not dedicated to the BOOT will be started thanks to your posts (this concerns different MCUs).

    And we will add the pins PC13, 14 and 15 as well in that study (vs pin name).

    BR. Jeanne

    Tesla DeLorean
    Tesla DeLorean
    Guru
    March 8, 2018
    Posted on March 08, 2018 at 18:44

    PI8 is on the lower power domain in some parts. And PH0,PH1 frequently have some odd and pairing functionality. I had some headaches with someone else's L0 design in HSE BYPASS mode.

    The Murata LoRa module to be specific, HSE BYPASS doesn't work properly with 32MHz TCXO clock input, preventing the use of PH1 as a GPIO, and never got a satisfactory answer about why.

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