Posted on April 15, 2016 at 23:18The original post was too long to process during our migration. Please click on the attachment to read the original post.
The expectation is that the system_stm32fxxx.c file is placed in your project directory, and tailored to specific chip/board designs. The ST file is definitely just a roughed-in starting point.
Around here we have some better fail-over code for the HSE and PLL, so the HSI will bring up the PLL, as without the PLL the SDIO, USB and CRYPT won't function at all. And a more generalized SystemCoreClock initial computation using the defines, so there are less source changes. On one specific build, that can run on all sorts of F4s (F407, F401, F411, F446, F429), I have it detecting the chip and selecting the CPU and PLL settings to run anywhere between 84 MHz and 180 MHz automatically.
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You are using an old/wrong ''system_stm32f4xx.c'' file of Standard peripheral library (SPL). Try to use the recent version/release of the library that you can find
That definitely makes sense. I have been changing the init value, then letting it try to stabilize an HSE, if that fails, feed the HSI into the PLL to bump the frequency up to enable some of the higher speed peripherals and last making a call to the SystemCoreClockUpdate() either way to update the global - as I use it in some of the SysTick code elsewhere.
Thank you for the information, it sounds like you have a much better way to generalize this.
