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wflanery
wflanery
Associate
June 6, 2016
Question

DCMI DMA synchronization on STM32F7

  • June 6, 2016
  • 1 reply
  • 908 views
Posted on June 06, 2016 at 19:52

I have the STM32F746 Discovery board and my project works with the OV9655 camera.

I am trying to switch over to use the MT9V034 camera chip from Aptina/OnSemi, which outputs 8bit grayscale (really, it outputs 10bit, but I'm only using the top 8 bits).

The DCMI uses the DMA to copy the incoming pixels from the camera to the camera buffer, but it isn�t synchronized with the FrameValid signal.  In other words, the test pattern from the camera can be seen in the camera buffer, but it is scrolling and maybe skewed.  I did some calculations with the o�scope to verify that I�m receiving the correct number of lines (272) and pixels per line (480), and the data is showing up in the correct memory region (camera buffer); it�s just not consistent from frame to frame.  My understanding is that the DCMI should control the DMA synchronization based on hardware (Hsync and Vsync, and PixClk).  I have checked all the signal polarities.  DMA is configured as a circular buffer with 0x7F80 transactions (480*272)/4.

Any other ideas?

#dcmi-dma
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1 reply

megahercas6
megahercas6
Associate III
June 6, 2016
Posted on June 06, 2016 at 21:48

This is my understanding hat is implement and working in my camera applications.

Just like in SPI, dma only cares about clock. So after you enable it, you just clock it, and it will copy data from DCMI register to memory with your defined step.

In order to assemble image in memory (external SDRAM/SRAM, since you need space, forger internal memory) you need enable DMA with correct address and pointer count.

If you are pushing the limits ( i can get 60MHz pck with SRAM with no problems) you need to use double DMA ( ping pong mode) so you can quickly switch address and pointer count size.

In order to sync it, i use VSINC falling edge to prepare DMA, and after that again falling HSYNC edge to recalculate DMA start address and increment my line counter, that is. DCMI does have HSYNC VSYNC interrupts , but i found ordinary GPIO interrupts are tiny bit faster, don't know why, but i can do all DMA stuff in less than 1us ( recalculating address, writing how many data needs to be copyed to memroy,  and re enabling DMA)

Don't know was is helpfull

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