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Vu.Andy
Associate III
August 15, 2017
Solved

Can the I2C Bus only send 9 pulses on the CLK line?

  • August 15, 2017
  • 3 replies
  • 2407 views
Posted on August 15, 2017 at 23:20

I am using the STM32F072 device and the I2C bus to talk to a slave device.  The slave device is an Texas Instrument battery management device.  The problem is this slave device I2C probably has a bug that occasionally the SDA line is held low for whatever reason.  The TI engineer told me that when this happens, the I2C master can send  9 pulses on the SCLK line.

My question is can the STM processor send 9 pulses on the SCLK line?  How can my code does that?

Thanks.

-Andy

    This topic has been closed for replies.
    Best answer by Tesla DeLorean
    Posted on August 16, 2017 at 00:51

    An I2C  bus, with a bunch of peripheral devices without any sort of asynchronous reset, you have to 'clock them out' of weird states. ie set SDA high, and bang SCL low and high, repeat for 9 or 10 cycles until SDA is released

    If ST's super I2C implementation doesn't automate this, check manual, then drive the GPIO-OD pins directly... Problem remediated...

    3 replies

    Tesla DeLorean
    Guru
    August 15, 2017
    Posted on August 15, 2017 at 23:24

    Standard method of clearing such a bus, in the worst case you can drive the GPIO

    Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..
    Vu.Andy
    Vu.AndyAuthor
    Associate III
    August 15, 2017
    Posted on August 16, 2017 at 00:29

    I am sorry but what do you mean by 'standard method of clearing'?

    And are you suggesting that the I2C bus be reconfigured as a standard GPIO then clear the bus then back to I2C?

    Tesla DeLorean
    Tesla DeLoreanBest answer
    Guru
    August 16, 2017
    Posted on August 16, 2017 at 00:51

    An I2C  bus, with a bunch of peripheral devices without any sort of asynchronous reset, you have to 'clock them out' of weird states. ie set SDA high, and bang SCL low and high, repeat for 9 or 10 cycles until SDA is released

    If ST's super I2C implementation doesn't automate this, check manual, then drive the GPIO-OD pins directly... Problem remediated...

    Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..