to answer that question you need the macrocell schematic and that's a secret. but you can guess, so how about this non-provable (yet disprovable) hypothesis: the macrocell requires clock to answer on the internal peripheral bus, no reads or writes to registers are possible otherwise. or this one: the macrocell is fully synchronous so no flip-flops can be updated without clock (can't write but might read regs). beyond the useful knowledge that you need the clock to use the macrocell, I can't think of a reason why you'd need the answer to your question. is there something specific you need to do or are you just curious?
I'm just starting off playing with the STM32. First task was to toggle I/Os (PortB). It does work, but there's a tiny thing I just don't get, so I would appreciate a bit of guidance there. Why do I need to enable port B clock when it's configured as a general purpose output? RCC->APB2ENR = RCC_APB2ENR_IOPBEN; GPIOB->CRH = 0x11111111; GPIOB->ODR = 0x0000af00; It doesn't work otherwise. I understand that IDR might need it to get refreshed, but I'm wondering why it's required to drive the output ? Tks, Richard
Yes it's curiosity, plus the fact that spontaneously it didn't think about enabling it. I couldn't find anything in the doc that could lead to it. I had to look into sample codes and voila. Anyway, your hypothesis does make a lot of sense to me as I was heading toward a very similar conclusion :D Tks, Richard