CHN1 and CHN1N collision - is it posible ?

Posted on June 07, 2014 at 16:52

hello dear forum

I designed an inverter for vibration tank ( photo below ) it issimply an H bridge with 500 V 20 A mosfets the frequency and duty is variable with STM32F103 the vibrator worked for 5 minutes and one of the H-mosfet blow up the L-mosfetalso show 0 resistance so it is also fried I added ( 100 nF 1 KOhm in series snubber )paralel to DS of every mosfet I suspect that there was a collision of CHN1 and CHN1N pleaselook at my code and comment if there is posibility of collision ( turn ON at the same time ) Or is there a snubber ( hardware design ) problem ? ( no software problem ) thank you

PWM_init(){ 
............... 
TIM_TimeBaseStructure.TIM_Prescaler = 99; 
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 
TIM_TimeBaseStructure.TIM_Period = 14400; 
TIM_TimeBaseStructure.TIM_ClockDivision = 0; 
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; 
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure); 
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Timing; 
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; 
TIM_OCInitStructure.TIM_Pulse = 1000; 
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; 
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High; 
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set; 
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set; 
TIM_OC1Init(TIM8, &TIM_OCInitStructure); 
TIM_OC2Init(TIM8, &TIM_OCInitStructure); 
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable; 
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable; 
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF; 
TIM_BDTRInitStructure.TIM_DeadTime = 120; 
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
//Enable; 
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low; 
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable; 
TIM_BDTRConfig(TIM8, &TIM_BDTRInitStructure); 
TIM_CCPreloadControl(TIM8, DISABLE); 
TIM_ARRPreloadConfig(TIM8, ENABLE); 
TIM_ITConfig(TIM8, TIM_IT_Update , ENABLE); 
TIM_Cmd(TIM8, ENABLE); 
TIM_CtrlPWMOutputs(TIM8, ENABLE); 
} 
------------------ 
main(){ 
......................... 
while
(1){ 
Delay(2000); 
// freq varies between 25 and 106 Hz and puls varies between %10 and %90 
//freqpot and pulspot are ADC channels connectted to potantiometers 
freqdisp=freqpotantiometer/5+250; 
freq=2*freqdisp ;duty=90-pulspotantiometer/51; 
period=7200000L/freq;puls=(period/100)*duty; 
// I want you comment especially on below bit of code 
// if the compare value is changed inbetween a PWM period 
// is there a posibility of CHN1 and CHN1N being ON at the same time 
// the ARR value is buffered but the compare registers are not as far as I know 
if
((freqold!=freq)||(pulsold!=puls)){ 
TIM_SetCompare1(TIM8, puls); 
TIM_SetCompare2(TIM8, puls); 
TIM_SetAutoreload(TIM8,period); } 
freqold=freq;pulsold=puls; 
............ 
} 
----------------- 
void
TIM8_UP_IRQHandler(
void
){ 
TIM_ClearFlag(TIM8, TIM_FLAG_Update); 
TIM_ClearITPendingBit(TIM8, TIM_IT_Update); 
tim8tog++; 
if
(tim8tog&0x1) { 
TIM_SelectOCxM(TIM8, TIM_Channel_1, TIM_OCMode_PWM2); 
TIM_CCxCmd(TIM8, TIM_Channel_1, TIM_CCx_Enable); 
TIM_CCxNCmd(TIM8, TIM_Channel_1, TIM_CCxN_Disable); 
TIM_SelectOCxM(TIM8, TIM_Channel_2, TIM_OCMode_PWM2); 
TIM_CCxCmd(TIM8, TIM_Channel_2, TIM_CCx_Disable); 
TIM_CCxNCmd(TIM8, TIM_Channel_2, TIM_CCxN_Enable); } 
else
{ 
TIM_SelectOCxM(TIM8, TIM_Channel_2, TIM_OCMode_PWM2); 
TIM_CCxCmd(TIM8, TIM_Channel_2, TIM_CCx_Enable); 
TIM_CCxNCmd(TIM8, TIM_Channel_2, TIM_CCxN_Disable); 
TIM_SelectOCxM(TIM8, TIM_Channel_1, TIM_OCMode_PWM2); 
TIM_CCxCmd(TIM8, TIM_Channel_1, TIM_CCx_Disable); 
TIM_CCxNCmd(TIM8, TIM_Channel_1, TIM_CCxN_Enable); } 
}

#stm32