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cpinkstone2
cpinkstone2
Associate II
April 15, 2013
Question

DMA STM32F4 with external SRAM and SSD1963 on FSMC

  • April 15, 2013
  • 6 replies
  • 1648 views
Posted on April 15, 2013 at 15:04

Hello,

I'm trying to configure DMA2 stream 0 to do a transfer from external SRAM on the FSMC to a SSD1963 Display controller also on the FSMC. This is my code can't seem to get it working, I assume this is possible?  

  /* Enable DMA clock */

  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);

  

  DMA_DeInit(DMA2_Stream0);

  while (DMA_GetCmdStatus(DMA2_Stream0) != DISABLE)

  {

  }

 

  /* Configure DMA Stream */

  LCD_DMA_InitStructure.DMA_Channel = DMA_Channel_0; 

  LCD_DMA_InitStructure.DMA_PeripheralBaseAddr = 0x68000000;

  LCD_DMA_InitStructure.DMA_Memory0BaseAddr = 0x6C000002;  

  LCD_DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;

  LCD_DMA_InitStructure.DMA_BufferSize = 0x320;  

  LCD_DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;

  LCD_DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;

  LCD_DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;

  LCD_DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;

  LCD_DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

  LCD_DMA_InitStructure.DMA_Priority = DMA_Priority_High;

  LCD_DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;        

  LCD_DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;

  LCD_DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;

  LCD_DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;

  DMA_Init(DMA2_Stream0, &LCD_DMA_InitStructure);

  DMA_ClearFlag(DMA2_Stream0, DMA_IT_TC);

 

  /* Enable DMA Stream Transfer Complete interrupt */

  DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);

 

  // DMA Stream enable

  DMA_Cmd(DMA2_Stream0, ENABLE);

#dma-stm32f4-fsmc-sram
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6 replies

waclawek.jan
waclawek.jan
Super User
April 16, 2013
Posted on April 16, 2013 at 06:39

''Manual'' transfers do work?

Why the ''odd'' address (not multiple of 4)?

JW
cpinkstone2
cpinkstone2Author
Associate II
April 16, 2013
Posted on April 16, 2013 at 09:28

JW,

Manual transfers are working fine, I just need to take some load off the CPU. The address also works fine on a manual write, the SSD1963 registers are toggled by A0 on a 16 bit bus.

Thanks

waclawek.jan
waclawek.jan
Super User
April 16, 2013
Posted on April 16, 2013 at 11:13

OK, and DMA with no bursts would work?

I am not sure your setup does not violate the rules for bursts, e.g. the 1kB address boundary rule.

JW

cpinkstone2
cpinkstone2Author
Associate II
April 17, 2013
Posted on April 17, 2013 at 10:00

JW,

I've tried it with single burst, this didn't work. 

The stream never seems to get enabled. 

Thanks 

cpinkstone2
cpinkstone2Author
Associate II
April 19, 2013
Posted on April 19, 2013 at 15:58

JW,

I've got it working now! I wasn't always calling   DMA_DeInit(DMA2_Stream0);  before I started writing out another line to the LCD via the DMA. works OK in single burst with FIFO. 

Thanks  

waclawek.jan
waclawek.jan
Super User
April 19, 2013
Posted on April 19, 2013 at 16:54

> I wasn't always calling   DMA_DeInit(DMA2_Stream0);

That would have been my very first recommendation, wouldn't it be included in the code in your original post... This is why it's important to post always the current and complete version of code... ;)

Glad you got it working.

Jan

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