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April 23, 2018
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Master clock generator in SAI1

  • April 23, 2018
  • 7 replies
  • 2499 views
Posted on April 23, 2018 at 07:40

Hello.

MCU: STM32L432KC. I'm trying to use SAI1 peripheral in master mode with master clock (MCLK) generation. I've found MCLK has drop pulses. You can see this at attached picture.

Clock configuration:

1. LSE with crystal 32768 Hz;

2. MSI with PLLMODE enabled;

3. RCC registers values:

CR = 0x0C0000BF

ICSCR = 0x106F008C

CFGR = 0x0

PLLCFGR = 0x00001071

PLLSAI1CFGR = 0xA8012B00

CCIPR = 0x0

CSR = 0x1C000600

Is i missed something?

Thanks.
    This topic has been closed for replies.
    Best answer by waclawek.jan
    Posted on April 26, 2018 at 01:15

    Sample rate is 24 MHz.

    The RCC settings indicate you want to output a clock at around 12.8MHz. The period of such is around 78ns, thus the duration of HIGH and LOW (if 1:1) is around 39us.

    If you sample them each 41.7us (that's the period at 24MHz), no wonder you miss some of the pulses here and there.

    JW

    7 replies

    waclawek.jan
    Super User
    April 23, 2018
    Posted on April 23, 2018 at 09:43

    MSI with PLLMODE enabled;

    Can't this be the root of problem? Can you try to switch off the PLLMODE or use some other primary clock source?

    JW

    smalcom
    smalcomAuthor
    Associate
    April 23, 2018
    Posted on April 23, 2018 at 11:55

    Unfortunately, disabling 'MSI PLL Mode' does not help.

    waclawek.jan
    Super User
    April 24, 2018
    Posted on April 24, 2018 at 02:45

    And how are the SAI registers set?

    JW

    waclawek.jan
    Super User
    April 24, 2018
    Posted on April 24, 2018 at 11:12

    Also, what's the sampling frequency of the LA you are using, and what are its analog bandwidth limits?

    JW

    smalcom
    smalcomAuthor
    Associate
    April 25, 2018
    Posted on April 25, 2018 at 10:16

    SAI registers:

    SAI1->GCR = 0x00000000

    SAI1_Block_A->CR1 = 0x00000040

    SAI1_Block_B->CR1 = 0x00010081

    SAI1_Block_A->CR2 = 0x00000000

    SAI1_Block_B->CR2 = 0x00000000

    SAI1_Block_A->FRCR = 0x00000007

    SAI1_Block_B->FRCR = 0x00050F1F

    SAI1_Block_A->SLOTR = 0x00000000

    SAI1_Block_B->SLOTR = 0xFFFF0140

    SAI1_Block_A->IMR = 0x00000000

    SAI1_Block_B->IMR = 0x00000000

    SAI1_Block_A->SR = 0x00000008

    SAI1_Block_B->SR = 0x00000000

    SAI1_Block_A->CLRFR = 0x00000000

    SAI1_Block_B->CLRFR = 0x00000000

    SAI1_Block_A->DR = 0x00000000

    SAI1_Block_B->DR = 0x00000000

    LA is the Saleae clone with SN74LVC2T45 level translators. Sample rate is 24 MHz. Unfortunately i don't know real bandwith of that device.

    smalcom
    smalcomAuthor
    Associate
    April 25, 2018
    Posted on April 25, 2018 at 10:17

    Forgot to explain: i use MCU only as clock generator.

    waclawek.jan
    waclawek.janBest answer
    Super User
    April 25, 2018
    Posted on April 26, 2018 at 01:15

    Sample rate is 24 MHz.

    The RCC settings indicate you want to output a clock at around 12.8MHz. The period of such is around 78ns, thus the duration of HIGH and LOW (if 1:1) is around 39us.

    If you sample them each 41.7us (that's the period at 24MHz), no wonder you miss some of the pulses here and there.

    JW

    smalcom
    smalcomAuthor
    Associate
    April 26, 2018
    Posted on April 26, 2018 at 13:05

    it was sample rate problem. My superfault. Thanks all to advice.