ADC dual mode w watchdog and dma: ADC1 watchdog appears not usable

Posted on February 02, 2014 at 05:12

I would like to find out if the following is correct--

The ADC1 watchdog comparison will not work when dual mode with DMA is used as dual mode places the ADC2 reading in the upper half of the ADC1 data register, with the result that the ADC1 DR will always be high compared to the 16b watchdog register (except if fortuitously the ADC2 conversion was zero).

Part: STM32F103GT6

The situation is a quadrature shaft encoder with two reflective photodetectors,  one to ADC1 and the other to ADC2.  The watchdog high/low registers with each are set to give hystersis and an interrupt, etc.  This works fine.

Now I want to add some monitoring of the values by using DMA in circular mode with 1/2 and completion interrupts, to store the conversion values in a buffer.  DMA requires setting dual mode, which causes the ADC1 Data Register to be loaded with ADC2 in the upper half of the word.  It appears that the ADC1 watchdog compare makes the comparison on the 32 bits and not just the lower 16b, with the result that using the watchdog for ADC1 will no longer work since the upper bits will have some bits from the ADC2 conversion.  I find that the ADC2 watchdog continues to work correctly, but ADC1 watchdog will not generate an interrupt.