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mandrake
mandrake
Associate III
March 29, 2017
Question

When does memory contention occur?

  • March 29, 2017
  • 9 replies
  • 1603 views
Posted on March 29, 2017 at 16:35

I am sure there is a simple answer to this question. DMA is accessing memory. When would there be contention for memory if the processor tries to access memory? Is it when the addresses are the same or is it when blocks of addresses overlap (i.e. same upper bits of address), and what block size? I am running STM32F407. 

#dma #memory-contention
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9 replies

Tesla DeLorean
Tesla DeLorean
Guru
March 29, 2017
Posted on March 29, 2017 at 17:40

When the decoded memory regions clash or the bus utilization conflicts. There should be a bus matrix diagram in the Reference Manual.

Consider you are memcpy()ing data into external memory for a video frame buffer, you also have a looping DMA task moving that data to an LCD on a different area of externally mapped memory (LCD registers), you are going to step on your own feet occasionally/frequently. Contention forces one operation to occur at a time. How frequently depend on the speed/bandwidth of the activities involved.

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mandrake
mandrakeAuthor
Associate III
March 29, 2017
Posted on March 29, 2017 at 17:57

Thanks, Clive.

I have an ADC sampling at 42Msps continuously. I am purposefully using a wrap-around dual-buffer DMA, 8k + 8k half-word size.

I am monitoring current target and waiting for the DMA to move from one buffer to the other before having the CPU access the off-buffer, single memory access at a time.

The purpose of all of this is to avoid memory contention. However, for my knowledge, I would like to know at what point a memory contention can occur. In other words, what is the size of memory regions that would be mutually exclusive.

Tesla DeLorean
Tesla DeLorean
Guru
March 29, 2017
Posted on March 29, 2017 at 20:13

A range of addresses within the same memory using the same 'chip select'.

ie SRAM1 being 112KB in size, SRAM 16 KB, per the RM0090 Reference Manual

For external memories in the 0x60000000..0x6FFFFFFF region you have 4 chip selects describing 0x04000000 (64MB) blocks

See also 'Figure 1. System architecture for STM32F405xx/07xx and STM32F415xx/17xx devices'

What can you possibly do with data at a 42Msps rate? Drinking from a firehose

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