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jpnorair2
jpnorair2
Associate II
February 3, 2012
Question

Timer (TIM2) goes twice as fast as expected

  • February 3, 2012
  • 4 replies
  • 1551 views
Posted on February 03, 2012 at 21:38

I can't tell if this is a ''feature'' or some strange incongruence.  I am using an STM32F103ZG (on STM3210E-EVAL board).  

- The clock is set to 48 MHz, as USB is being used.  

- The APB1 bus is set to 12 MHz (divided by 4).

- The TIM2 rate should be 1024 Hz

Therefore, one would expect the TIM2 prescaler to be: 12 000 000 / 1024 = 11718.75 (11719).  However, when using this prescaler value, the TIM2 rate is indeed 2048 Hz.  So I need to use 23437 as the prescaler value to achieve 1024 Hz.  I can confirm that the RCC is configured correctly and matches the values expected by the reference manual.

Is this a ''feature''of the timer?  I want the code to be portable to other STM32's, so I hope it is normal behavior.
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    4 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    February 3, 2012
    Posted on February 03, 2012 at 22:12

    Yeah, need to look at the clock tree in the reference manual, for all cases other than APB prescaler of 1 the TIMCLK is APB *2.

    APB = CLK / 1; TIM = CLK;

    APB = CLK / 2; TIM = CLK;

    APB = CLK / 4; TIM = CLK / 2;

    Thus even with an APB1 clock of 36 MHz, the timers attached run at 72 MHz

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    jpnorair2
    jpnorair2Author
    Associate II
    February 3, 2012
    Posted on February 03, 2012 at 22:24

    Thanks for the information.  I've always worked on low-power apps, so this is the first time I have ever needed to clock-divide the bus.  Nonetheless, this is a weird feature.  I can't imagine what the designers had in mind.

    Tesla DeLorean
    Tesla DeLorean
    Guru
    February 3, 2012
    Posted on February 03, 2012 at 22:27

    With a TIM_TimeBaseStructure.TIM_Prescaler value of 23437 you'll get 1023.97816 Hz, ie (24 MHz / 23438)

    You will not get a exactly 1024 Hz, to do that you'd need a 48 MHz input clock.

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    Tesla DeLorean
    Tesla DeLorean
    Guru
    February 3, 2012
    Posted on February 03, 2012 at 22:34

    I can't imagine what the designers had in mind.

    That they didn't want to cripple the timers to 36 MHz, on a bus with peripherals limited to that. ie smaller transistors, looser timing closure.

    Also being stuck with integer dividers, to have any chance of generating some frequencies you need the granularity offered by faster input clocks.

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