fsmc and nand flash

NAND memories access as block devices, they don't provide linear access like NOR. You access them through a window, and can therefore provide huge amounts of storage in a much smaller address space.

thank you :)

what about this question

64 MB x 4 = 256 MB (0x10000000)

thank all for fast reply  :)

i will buy 512mbyte very fast nand flash. and execute programm code from it .

i see some data sheet about nor flash and sram. but all very slow  .compared with internal flash and sram . if i use two sram and two nor flash it will increase speed and capacity. or will increase capacity only

Well you have a couple of issues, the Cortex-M3 is designed to used tightly coupled memories for rapid execution, it does not have a cache mechanism to defray the slow speed of external memories. The ART cache which masks the intrinsic slowness of the internal flash is tailored to that specific architecture, and represent a critical path for prefetch accesses. External memory accesses on ST parts have historically been slow, driving the bus also takes a lot of power as it has to escape the core, and boost the current/voltage. ST parts (STR9, STR7, STM32) do not support SDRAM, so you are pushed into more expensive and lower capacity parts when adding external memory.

http://www.st.com/internet/com/press_release/p3357.jsp

thank you for your help and full support :) .

You'd need to describe the regions of memory in your GUI, scatter file or linker script. You'd define sections within these regions, and then direct the compiler to place specific functions or objects within those sections.