IAR : 32 bits SP is not 64 bits DP !

Posted on November 26, 2014 at 15:51

Ok, and your point is what?

They used sqrt() as a software FP solution, because the sqrtf() would likely use the FPU in any reasonably selected library. Try timing a software sqrtf() implementation vs an FPU assisted one.

Posted on November 26, 2014 at 19:08

My point is that despite IAR recommend to use arm_sqrt function to optimize speed, I recommend to use sqrtf, witch is 2 time faster.

The arm_sqrt is based on a Newton-Raphson iterative algorithm using FPU for basic maths (mul/add...). Since the FPU has the VSQRT instruction, I cannot see why to don't use it.

I'm just sorry but using double types to bypass a 32bits-FPU is not a good idea. Disabling FPU in the compiler options make more sense. 

Without FPU (and without optimizations), the timing are :

arm_sqrt_f32 : 250 cycles

sqrt : 663 cycles

sqrtf : 188 cycles

With FPU :

arm_sqrt_f32 : 55 cycles

sqrt : 655 cycles

sqrtf : 28 cycles

IAR conclusion :

''From this simple example, we can see that CMSIS-DSP is very easy to use and that it improves the performance significantly.''

nonsense.

Posted on November 26, 2014 at 19:19

The arm_sqrt is based on a Newton-Raphson iterative algorithm using FPU for basic maths (mul/add...). Since the FPU has the VSQRT instruction, I cannot see why to don't use it.

 

Look at the head comment in the implementation file ''arm_sqrt_q31.c''. It says:

* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0

 

Not all the listed cores feature the FPU.