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Ravi Sharma
Ravi Sharma
Associate
April 12, 2018
Question

STM32F103C8T6 ADC Clock

  • April 12, 2018
  • 1 reply
  • 600 views
Posted on April 12, 2018 at 11:51

Hi Friends,

I am new in community. I have stm32f103c8t6 board. I am using stm cubemx to generate code for ADC reading measurement.  as I saw in cumemx diagram I found that sysclk is set for 8MHZ.

I want to know how I can change the ADC clock speed more then this.

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    1 reply

    Tesla DeLorean
    Tesla DeLorean
    Guru
    April 13, 2018
    Posted on April 13, 2018 at 17:06

    You'll need to configure the PLL to get a 64 or 72 MHz clock from the HSI, or HSE source, and then divide it down for the ADC. Seem to recall the F1 ADC being rated for 14 MHz operation although I've seen people clock it higher

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