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John Kenny
Associate
April 26, 2018
Question

Using audio clock (22.5792MHz or 24.576MHz) as STM system clock

  • April 26, 2018
  • 3 replies
  • 2923 views
Posted on April 26, 2018 at 16:37

I've seen STM audio boards (SD card player) with only two audio clocks (5792MHz & 576MHz) on the pcb. Depending on the speed family of the audio file being read, the STM uC is using the relevant audio clock as its system clock. Does anyone have a link to the code which does this, please?

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    3 replies

    Tesla DeLorean
    Guru
    April 26, 2018
    Posted on April 26, 2018 at 16:52

    What board? What STM32? Lots of combinations, lets try and narrow it down a bit.

    Most STM32 can take external sources in range 4-50 MHz, or crystals upto 25 or 26 MHz, these don't have to be integers. The part can clock from HSI also, and PLL can be used for I2S. The I2S clock can be feed from a different pin as I recall. Clock sources can be transitioned between HSI, HSE and PLL, you have to stop the PLL to reconfigure it, so switch to a clock that is still running to keep the synchronous machine running.

    You'd need to define HSE_VALUE correctly, and fiddle with PLL settings (simple gear ratios)

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    John Kenny
    Associate
    April 26, 2018
    Posted on April 26, 2018 at 17:00

    Thanks Clive

    Here's the board

    https://aealicdn.com/kf/HTB1yQHxeoo09KJjSZFDq6z9npXaM.jpg

    - it's as simple as it gets - STM32F4 read SD card into memory chip & outputs I2S audio signals

    Other side of board is just screen & control buttons

    As you can see just two audio clocks on pcb so STM is switching between these as system clock depending on the samplerate of the audio file.

    The benefit is that the system clock & I2S clock are always synchronised so no clock crossing domain issues

    John Kenny
    Associate
    April 26, 2018
    Posted on April 26, 2018 at 17:40

    Just to describe the operation of the board some more - there is an enable signal pcb track to each clock & each clock signal is routed through a resistor back to one clock input pin on the STM. So the correct clock is enabled depending on what samplerate audio file is being read i.e 22.5792MHz clock is enabled if audio file is 44.1KHz, 88.2KHz, 176KHz, 352KHz & 24.576MHz clock is enabled for the other speed family 48, 96,192, 384KHz samplerate

    Now the STM must have a system clock it uses to read the audio file off the SD card before it has analysed the samplerate & set the correct audio clock (which then becomes the new system clock).

     I'm wondering how this is all done - I guess the system clock be changed when the audio files has been read & copied to the pcb memory chip?

    Just wondering if anyone has encountered this before & have any pointers?

    Tesla DeLorean
    Guru
    April 26, 2018
    Posted on April 26, 2018 at 17:57

    Looks like there is a mux chip, or switch, 6-pin chip on right of oscillators.

    You can shift speeds in much the same way you'd change gears in a manual transmission car.

    The CPU could run of the PLL+HSI, and switch between HSI, HSE, PLL as sources, and drive the GPIO as required. You'd need to code to 'clutch' the transfer, but just a matter of reconfiguring/sequencing a bunch of RCC registers.

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    waclawek.jan
    Super User
    April 26, 2018
    Posted on April 27, 2018 at 01:40

    If the F04 is powerful enough (& it is for this simple job) then I don't see the need for a different uC

    You probably mean 'F40x - 'F04x is from an entirely different line (and that would certainly pose a challenge, but probably wouldn't be impossible to use). 

    The audio playback is not something processing intensive; and while as I said I haven't use SD cards yet, I wouldn't anticipate those be processing intensive either. Unless the audio needs substantial processing (DSP or (de)compression), it's mostly just moving data from one pile to other, and leave the hardware (DMA) do the rest. OTOH some of the 'F0xx lack enough I2S-related resources, and also the dedicated SD-card interface.

    The presented board is based on 'F407 but that was probably not a very thoroughly though out choice, or those chips were at hand already for some reason. One of the telling signs is that the somewhat cheaper 'F405 is identical except it does not have the ETH interface (which is not used on this board).

    This board may also predate the 'F446 I am talking about. I tend to optimize my designs.

    I know a SYNCH clock ISN'T needed but that is a design choice that works for me, for various reasons.

    Could you please elaborate? The last 7 years I am moving audio and similar data to and from the STM32s and I haven't found a single reason for synchronizing the data stream with the system clock, yet. I don't pretend I know every possible usage case, of course; and I am curious.

    Thanks,

    JW

    John Kenny
    Associate
    April 27, 2018
    Posted on April 27, 2018 at 01:52

    Yes, typo, sorry, I meant F40

    Thanks for the info on F446, I'll take a look

    Agreed audio isn't process intensive

    In my past limited experience of SD card players using STM & other uCs that have used a separate system clock, none of them sound as good as this SD player & I'm working on the premise that the simplicity of design (mainly the use of audio clock as system clock which avoids clock mixing in the uC) is the primary ingredient for the quality of this sound