Triac Ripple Voltage T1250H-6I (with schematic)

[JSper.1]

Hello

I am currently developing an AC switch for a heating boiler in a coffee machine.

The boiler has a power rating of approx. 1200W.  

To control the boiler, I have opted for a triac circuit (T1250H-6I) with an optotriac (14230634300) and ZCC. I used Application Note AN5114 to size the resistors. The description is generally excellent. However, I have a question regarding the voltage ripple on the triac. The note recommends a value of 4V. I cannot achieve this value with the standard resistor values available. My calculations give a voltage ripple of approx. 25V. Is that too much? Or what can I do to get down to the recommended value of 4V, triac with lower Igt?

Best regards
John

 

[Peter BENSCH]

Yes, 25V is generally too high for this kind of triac drive. The 4V figure in AN5114 is a practical target to keep late triggering, EMI, and harsh current edges under control.

You could try:

• reduce RGK (puts greater load on the optotriac stage and can worsen switching behavior / noise immunity)
• reduce R1+R2 within surge limits (too small can stress the optotriac or the gate connection)
• use a more sensitive triac with lower IGT, e.g. the T1205 or T1210

An RC snubber helps against dV/dt problems, but a larger C1 can also affect the firing point, and under certain circumstances even worsen the ripple. For your goal, the key factors are more likely RGK and gate current dimensioning.

Hope that helps?

Regards
/Peter

[JSper.1]

Hi Peter

Thx, yes of course it helps... 
I thought as much – that I’d have to use a different triac. Could I also use a different optotriac with a higher Isurg current? In that case, I could also reduce the value of R1+R2. The high-temperature triac variants would fit well with my cooling design, as I don’t have much space for a larger heat sink.

[Peter BENSCH]

It probably doesn’t make much sense to use an opto triac with an even higher ITSM, since the 14230634300 can already handle 1A, even if that is only the non-repetitive surge current. If you find an opto TRIAC with an even higher current supply capability, you can of course try to improve your results.

The alternatives T1205, T1210, and T1235 are direct replacements for the T1250, with different trigger currents and different dv/dt resp. dI/dT values.

Regards
/Peter

[JSper.1]

Hi Peter
I’ve looked at various manufacturers, and all optocouplers with zero-crossing have an ITSM of exactly 1A – no higher and no lower. Perhaps this is a system limitation.

I think I’ll switch to the T1610T-8I triac. My calculations give a voltage ripple of 5.6V, but the AC simulator recommends this triac with a small heat sink in the range of 10–12 °C/W.

Peter, do you think the optocoupler’s zero-cross detection has an effect on the voltage ripple? And what do you think of this combination of triac and optocoupler?

[Peter BENSCH]

The zero-cross function influences the ripple indirectly, but the main factor is still whether the power triac receives enough gate current early enough to fire reliably. For a boiler load, your T1610T-8I + ZC optotriac approach looks OK and is a good topology.

A ripple of 5.6V is not necessarily a problem. The 4V value in AN5114 is best seen as a practical target, not a strict limit. What matters most is:

• reliable turn-on over all tolerances
• acceptable EMC behaviour
• no false triggering
• sufficient thermal margin

You should focus more on:

• worst-case gate current
• the values of the series resistors and RGK
• EMC measurements
• thermal performance

rather than on the ripple value alone. R1, R2 and RGK should not be chosen too conservatively. Smaller values improve triggering on the one hand, but they also increase current peaks, the load on the optotriac, and may cause EMC problems.

If you absolutely need zero crossing but want to use an optotriac without ZC, you could consider handling the ZC detection with the controlling MCU, which is quite feasible with a predominantly resistive load like your boiler. Advantages:

• wider component choice
• more flexible gate timing
• potentially better optimisation of ripple and EMC

Trade-offs:

• more design complexity
• stricter safety and isolation requirements
• timing tolerances in hardware and software
• more validation effort

Regards
/Peter

[JSper.1]

Hi Peter
Yes, you’re right. Thanks so much for your excellent help. I’ll start with this setup, build the hardware and do some tests. I can always change the components afterwards. The circuit topology is the same, anyway.
Do you have any final tips for me on triac circuits? :)