Supply management of powerstep01

[dungeonlords789]

I use powerstep01's datasheet "7.19 Supply management and internal voltage regulators".

datasheet says: "VSREG must be always less than VBOOT". May be not Vboot, but Vbus?Also "The device can be protected from this event by adding an external low drop diode between the VSREG and VS pins, charge pump diodes should be low drop too." I need example of low drop diode between the VSREG and VS pins. So I look schematic of ihm03a1.

In real pcb R23 is mounted and D10 too. Is it a joke? May be I should do:

 

And what is VDDIO? What is different between VDDIO (Logic interface supply voltage) and VREG (Logic supply voltage)? Should I use galvanic isolation to communicate STM32F401 with powerstep01?

[Cristiana SCARAMEL]

Hello @dungeonlords789​,

the sentence "VSREG must be always less than VBOOT" is right.

In general the device works properly when VSREG less than or equal to VS which in turn is lower than VBOOT.

In the X-NUCLEO-IHM03A1 board by default the VCC is internally generated and the VREG is supplied externally through the VDD (provided by STM32 Nucleo board).

In fact the VCCREG and VREG pins are shorted and D9 is the protection diode (to avoid VCCREG > VCC).

Using external supply it is possible supply external components (e.g. LED).

If you want provide externally also the VCC, the VSREG and VCC pins must be shorted (shorting R24) and remove R23 using D10 as protection diode.

The VDDIO pin (VDD voltage) imposes logical output voltage range of SDO pin and it can be equal to 3.3 V or 5 V.

Moreover, the SW and CS inputs are internally pulled up to VDD voltage.

No galvanic isolation is required.

However pay attention that the operating voltage for NUCLEO shields is limited compared with the operating range of the device, e.g. for X-NUCLEO-IHM03A1 is from 10.5 to 50 V.

Let me know if I answered all your doubts.

[dungeonlords789]

Can you provide more information about "No galvanic isolation is required." There are stm32f401, powerstep01, 1.7A stepper motor and hd44780 screen. And there is noise (broken symbols) on hd44780 sometimes.

I am thinking about 85V 10A motors and I am afraid of noise...

[Cristiana SCARAMEL]

In your original question you referred to the communication between STM32F401 and powerSTEP01.

I do not know the HD44780 device, its characteristics and how to work.

[dungeonlords789]

Can you provide example of schematic for Figure 15 case? What means "Using external components (zener diodes, resistors, ...) it is possible to reduce internal power dissipation constrains."? This is my version (Vbus is +36V in my project):

Datasheet says nothing about current over +15V and +3.3V circuits. This is a problem too. So if I use zener diode it can provide about 1mA, is it ok? Another version

Also why it is interesting to provide external +15V and +3.3V to powerstep01? This is noisy motor control IC so it is best way to use internal LDO, isn't it?

"The VDDIO pin (VDD voltage) imposes logical output voltage range of SDO pin and it can be equal to 3.3 V or 5 V.

Moreover, the SW and CS inputs are internally pulled up to VDD voltage."

It is very interesting! You should add this to datasheet.

[Cristiana SCARAMEL]

Hello @dungeonlords789​ ,

If I understand well in your application you have VS = 36 V and you want to generate VCC = 15 V and VREG = 3.3 V using internal linear voltage regulators.

In this case you can use a simple topology, there is no need of external components to reduce the power dissipation of internal regulators. The info about current regulators is "inside" the maximum power dissipation of each regulators, you can find these parameters in the Electrical characteristics table 4 (pages 15 and 16).

Always aiming to reduce the power dissipation, it is possible provide externally VCC and VREG supply voltage (usually is needed for high VS).

Concerning the recommended value for external capacitor refer to the Typical Applications in the datasheet (paragraph 6 at page 20).

The info about VDD voltage is reported in the datasheet 7.2 Logic I/O paragraph at page 22 (VDD pin is the VDDIO pin ;) ).

Let me know if I solved your doubts.

[dungeonlords789]

If I use four 85V 10A motors driven by powerstep01 and stm32f401 I do not need galvanic isolation?

[dungeonlords789]

If I use four 85V 10A motors driven by powerstep01 and stm32f401 I do not need galvanic isolation?

@Cristiana SCARAMEL​